TXC-04222-AIOG Transwitch Corporation, TXC-04222-AIOG Datasheet - Page 145

• Manufacturer Part Number: TXC-04222-AIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-04222-AIOG

• Screening Level: Industrial
• Package Type: BGA
• Lead Free Status / Rohs Status: Not Compliant

MASK BITS FOR A AND B BUS STATUS ALARMS
Address
005
Proprietary TranSwitch Corporation Information for use Solely by its Customers
Bit
7
6
5
4
3
2
1
0
Symbol
MPCDA
MPCDB
MPCAB
MGDA
MGDB
MGAB
HINT
Hardware Interrupt Enable: A 1 enables a hardware interrupt to occur
on a bus alarm or polling bit provided the corresponding interrupt mask
enable bits (global indication bits MGDA, MGDB, MGAB, MPCDA,
MPCDB, and MPCAB) in the interrupt structure is set to a 1. A 0 disables
the hardware interrupt lead.
Not used:
Mask Bit for Global Indication for A Drop Bus Alarms: A 1 enables a
hardware interrupt for the global indication (GDA) for A drop bus alarms
when control bit HINT is set to 1. A 0 disables the hardware interrupt for
the global indication bit GDA.
Mask Bit for Global Indication for B Drop Bus Alarms: A 1 enables a
hardware interrupt for the global indication (GDB) for B drop bus alarms
when control bit HINT is set to 1. A 0 disables the hardware interrupt for
the global indication bit GDB.
Mask Bit for Global Indication for A and B Add Bus Alarms: A 1
enables a hardware interrupt for the global indication (GAB) for A/B add
bus alarms when control bit HINT is set to 1. A 0 disables the hardware
interrupt for the global indication bit GAB.
Mask Bit for Global Indication for A Drop Channel Alarms: A 1
enables a hardware interrupt for the global indication (PCDA) for A drop
polling registers (A drop alarms for all channels) when control bit HINT is
set to 1. A 0 disables the hardware interrupt for the global indication bit
PCDA.
Mask Bit for Global Indication for B Drop Channel Alarms: A 1
enables a hardware interrupt for the global indication (PCDB) for B drop
polling registers (B drop alarms for all channels) when control bit HINT is
set to 1. A 0 disables the hardware interrupt for the global indication bit
PCDB.
Mask Bit for Global Indication for A and B Add Channel Alarms: A 1
enables a hardware interrupt for the global indication (PCAB) for A and B
add polling registers (A and B add alarms for all channels) when control
bit HINT is set to 1. A 0 disables the hardware interrupt for the global
indication bit PCAB.
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DATA SHEET
Description
TXC-04222-MB, Ed. 6
TXC-04222
TEMx28
June 2003