TXC-04222-AIOG Transwitch Corporation, TXC-04222-AIOG Datasheet - Page 166
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TXC-04222-AIOG
Manufacturer Part Number
TXC-04222-AIOG
Description
Manufacturer
Transwitch Corporation
Datasheet
1.TXC-04222-AIOG.pdf
(246 pages)
Specifications of TXC-04222-AIOG
Screening Level
Industrial
Package Type
BGA
Lead Free Status / Rohs Status
Not Compliant
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June 2003
TEMx28
TXC-04222
TXC-04222-MB, Ed. 6
Address
073
074
075
076
077
7-0
7-0
7-0
7-0
7-4
3-0
Bit
Proprietary TranSwitch Corporation Information for use Solely by its Customers
Polling Bits
Polling Bits
Polling Bits
Polling Bits
Drop Bus
Drop Bus
Channels
Channels
Channels
Channels
Symbol
E1 Byte
A Side
A Side
A Side
A Side
A Side
24-17
28-25
Drop
Drop
Drop
16-9
8-1
A Side Drop Bus E1 Overhead Byte for STS-3 STS-1 No. 3/AU-3 C:
The value in this location is dropped E1 overhead byte in the A Drop Bus
STS-3 STS-1 No. 3/AU-3 C format. This register location is updated
every 125 microseconds. Bits 7-0 of the register correspond to bits 1-8 of
the E1 byte.
A Side Drop Polling Registers, Channels 8-1: Bit 7 corresponds to the
polling bit for channel 8. A polling bit is set to 1 when one or more A side
drop alarms are detected in a channel and the corresponding mask bit is
set to 1. This bit is cleared when the A side latched alarms correspond-
ing to the channel that is set to 1 are read, or the mask bit associated
with the alarm in the interrupt hierarchy is set to 0.
A Side Drop Polling Registers, Channels 16-9: Bit 7 corresponds to
the polling bit for channel 16. A polling bit is set to 1 when one or more A
side drop alarms are detected in a channel and the corresponding mask
bit is set to 1. This bit is cleared when the A side latched alarms corre-
sponding to the channel that is set to 1 are read, or the mask bit associ-
ated with the alarm in the interrupt hierarchy is set to 0.
A Side Drop Polling Registers, Channels 24-17: Bit 7 corresponds to
the polling bit for channel 24. A polling bit is set to 1 when one or more A
side drop alarms are detected in a channel and the corresponding mask
bit is set to 1. This bit is cleared when the A side latched alarms corre-
sponding to the channel that is set to 1 are read, or the mask bit associ-
ated with the alarm in the interrupt hierarchy is set to 0.
Not used:
A Side Drop Polling Registers, Channels 28-25: Bit 3 corresponds to
the polling bit for channel 28. A polling bit is set to 1 when one or more A
side drop alarms are detected in a channel and the corresponding mask
bit is set to 1. This bit is cleared when the A side latched alarms corre-
sponding to the channel that is set to 1 are read, or the mask bit associ-
ated with the alarm in the interrupt hierarchy is set to 0.
DATA SHEET
- 166 of 246 -
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