TXC-04222-AIOG Transwitch Corporation, TXC-04222-AIOG Datasheet - Page 82

• Manufacturer Part Number: TXC-04222-AIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-04222-AIOG

• Screening Level: Industrial
• Package Type: BGA
• Lead Free Status / Rohs Status: Not Compliant

June 2003
TEMx28
TXC-04222
TXC-04222-MB, Ed. 6
TC ODI Generation
Bit 7 in frame 74 is defined as a Tandem Connection Outgoing Defect Indication (TC ODI). An TC ODI alarm
indication is generated for the following unlatched alarm indications. TC ODI is sent for a minimum of 10 times.
- When TC enable (TCnRE) is a 1 and the RnJ2S1 of the corresponding drop bus is 0.
- When TC enable (TCnRE) is a 0
TC Unequipped Generation
The TEMx28 provides the ability to generate a VT/TU Tandem Connection Unequipped signal on a per chan-
nel basis when the TC feature is enabled for a channel. When control bit AnTCUQ (bit 2, X+064H) or BnTCUQ
(bit 2, X+0D4H) is a 1, a TC unequipped status is transmitted. The TEMx28 can generate a unequipped status
byte with a valid BIP-2 (bits 1 and 2, and the remaining bits in the byte equal to 0 (XX00 0000), or all bits in the
N2 byte equal to 0 (0000 0000). When control bit TB2DIS (bit 2, register 03BH) is a 0, a valid BIP-2 is transmit-
ted.
Overhead Bytes - Microprocessor Written
In addition to the J2 byte, the overhead bytes may also be transmitted with a microprocessor written value. The
microprocessor written value has priority over any other source except Unequipped or VT/TU AIS. When con-
trol bit ATnV5BS (bit 0, X+064H) or BTnV5BS (bit 0, X+0D4H) is written with a 1, the value written to register
X+060H for the A side and register X+0D0H for the B side is transmitted in the V5 byte.
When control bit ATnK4PC (bit 1, X+065H) or BTnK4PC (bit 1, X+0D5H) is written with a 1, the value written to
register X+062H for the A side and register X+0D2H for the B side is transmitted in the K4 byte.
When control bit ATnTCEN (bit 2, X+063H) or BTnTCEN (bit 2, X+0D3H) is written with a 0 (TC feature dis-
abled), the value written to register X+061H for the A side and register X+0D1H for the B side is transmitted in
the N2 byte.
VT/TU AIS GENERATION
The TEMx28 provides the ability to generate a VT/TU AIS signal on a per channel basis. When a 1 is written to
control bit ATnGAIS (bit 6, X+063H) or BTnGAIS (bit 6, X+0D3H) for channel n, a TU/VT AIS is generated for
corresponding bus. A TU/VT AIS consists of all ones in the entire tributary signal, including bytes V1 through
V4. A TU/VT AIS will override a unequipped channel when set.
- Drop Bus Loss Of Clock (ADLOC, BDLOC) when DLCTE is a 1
- Drop Bus AIS alarm (AxUAIS, BxUAIS) when HEAISE and USTCE are 1
- Loss of pointer alarm (AnLOP, BnLOP)
- VT/TU AIS detected (AnAIS, BnAIS)
- Unequipped signal label (AnUNEQ, BnUNEQ) when UQTCE is a 1
- Mismatch signal label (AnSLER) when PLSTCE is a 1
- J2 Loss Of Lock Alarm (AnJ2LOL, BnJ2LOL) when J2TCE is a 1
- J2 Mismatch Alarm (AnJ2TIM, BnJ2TIM) when J2TCE is a 1
- VT AIS detected (AnVCAIS, BnVCAIS) when VCTCE is a 1
- TC Loss Of Multiframe (AnTCLM, BnTCLM)
- TC Loss Of Lock Alarm (AnTCLL, BnTCLL)
- TC Mismatch Alarm (AnTCTM, BnTCTM)
- TC Unequipped Alarm (AnTCUQ, BnTCUQ)
- TC AIS Detected (AnTCAIS, BnTCAIS), TC enabled and TCAISE is a 1
- A 1 written to ATnTCSO, BTnTCSO
- A 1 written to ATnTCSO, BTnTCSO
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