TXC-04222-AIOG Transwitch Corporation, TXC-04222-AIOG Datasheet - Page 152

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TXC-04222-AIOG

Manufacturer Part Number
TXC-04222-AIOG
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-04222-AIOG

Screening Level
Industrial
Package Type
BGA
Lead Free Status / Rohs Status
Not Compliant
June 2003
TEMx28
TXC-04222
TXC-04222-MB, Ed. 6
Address
052
053
054
055
056
7-2
7-2
7-2
7-0
7-0
Bit
1
0
1
0
1
0
Proprietary TranSwitch Corporation Information for use Solely by its Customers
Add Alarms
Add Alarms
Channels
Channels
PBBLOC
LBBLOC
LABLOC
PABLOC
FBBLOC
FABLOC
Symbol
Register
Register
Polling
Polling
16-9
8-1
Not used:
B Add Bus Loss Of Clock Alarm Latched Alarm Indication: This bit
position latches when the B side Add bus has detected a loss of clock
when add bus timing is selected. This bit is set on either a positive transi-
tion, negative transition or positive and negative transition. This bit is
cleared in a read cycle.
A Add Bus Loss Of Clock Alarm Latched Alarm Indication: This bit
position latches when the A side Add bus has detected a loss of clock
when add bus timing is selected. This bit is set on either a positive transi-
tion, negative transition or positive and negative transition. This bit is
cleared in a read cycle.
Not used:
B Add Bus Loss Of Clock One Second Alarm Indication: This bit
position is set when the B side add bus loss of clock alarm indication has
changed state in the last one second interval or is 1 at the end of the
interval. This bit is disabled if the one second pulse is not applied. This
indication does not cause an interrupt.
A Add Bus Loss Of Clock One Second Alarm Indication: This bit
position is set when the A side add bus loss of clock alarm indication has
changed state in the last one second interval or is 1 at the end of the
interval. This bit is disabled if the one second pulse is not applied. This
indication does not cause an interrupt.
Not used:
B Add Bus Loss Of Clock Persistent One Second Alarm Indication:
This bit position is set to 1 for the one-second interval, when the B side
add bus loss of clock alarm indication is active, but did not become
active in the previous one second interval.
A Add Bus Loss Of Clock Persistent One Second Latched Alarm
Indication: This bit position is set to 1 for the one-second interval, when
the A side add bus loss of clock alarm indication is active, but did not
become active in the previous one second interval.
Polling Registers, Channels 8-1 Alarms: Bit 7 corresponds to the poll-
ing bit for channel 8. A polling bit is set to 1 when one or more A/B add
side latched alarms occurs in a channel and the corresponding mask bit
is set to 1. This bit is cleared when the add side latched alarms corre-
sponding to the channel that is set to 1 are read, or the mask bit associ-
ated with the alarm in the interrupt hierarchy is set to 0.
Polling Registers, Channels 16-9 Alarms: Bit 7 corresponds to the
polling bit for channel 16. A polling bit is set to 1 when one or more A/B
add side latched alarms occurs in a channel and the corresponding
mask bit is set to 1. This bit is cleared when the add side latched alarms
corresponding to the channel that is set to 1 are read, or the mask bit
associated with the alarm in the interrupt hierarchy is set to 0.
DATA SHEET
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Description

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