TXC-04222-AIOG Transwitch Corporation, TXC-04222-AIOG Datasheet - Page 72

• Manufacturer Part Number: TXC-04222-AIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-04222-AIOG

• Screening Level: Industrial
• Package Type: BGA
• Lead Free Status / Rohs Status: Not Compliant

June 2003
TEMx28
TXC-04222
TXC-04222-MB, Ed. 6
OVERHEAD COMMUNICATIONS BIT ACCESS
Microprocessor access is provided for the eight overhead communications bits (O-bits) carried in the two justi-
fication control (JC) bytes in the multiframe format, e.g., in a 1544 kbit/s Tributary, shown partially below. The
bits in the justification control byte are numbered 1 through 8, starting with C1 as bit 1.
In the receive direction, the eight O-bits are stored in 8-bit registers for each channel assigned for the A and B
drop buses. The A side register location is X+18AH, and B side register location is X+20AH. The O-bit regis-
ters are updated each multiframe with the two O-bit nibbles from the same multiframe. Bits 7 through 4 in an
O-bit register correspond to bits 3 through 6 (C1C2 OOOO DR) in the first justification control byte, and bits 3
through 0 in an O-bit register correspond to bits 3 through 6 in the second justification control byte, as shown
below.
VT/TU RECEIVE INTERFACE
The VT/TU interface provides user access to the 104 byte VC-11 or the 140 byte VC-12 with or without the
overhead bytes. The VT/TU interface is enabled when control bits RnLINT1 (bit 7, X+006H) and RnLINT0 (bit
6, X+006H) are set to 11. The options associated with this interface are given in the following table.
(bit 2, X+006H)
RnSEL
0
0
1
1
JC Byte 1
JC Byte 2
Register
O-bits
Proprietary TranSwitch Corporation Information for use Solely by its Customers
(bit 4, X+008H)
RnVTVC
O(1)
C1
C1
7
0
1
0
1
O-bit Placement in a 1544 kbit/s Tributary
O(2)
C2
C2
6
A side payload bytes provided. The V5, J2, N2, and K4 overhead bytes
are not provided. The clock is gapped during the overhead byte times. A
positive frame pulse determines the last bit of the frame.
A side payload bytes provided. The V5, J2, N2, and K4 overhead bytes
are provided. A positive frame pulse determines the last bit of the frame.
B side payload bytes provided. The V5, J2, N2, and K4 overhead bytes
are not provided. The clock is gapped during the overhead byte times. A
positive frame pulse determines the last bit of the frame.
B side payload bytes provided. The V5, J2, N2, and K4 overhead bytes
are provided. A positive frame pulse determines the last bit of the frame.
O-bit Assignment Memory Map
DATA SHEET
O(1)
O(5)
O(3)
5
- 72 of 246 -
24 Bytes - Information
O(2)
O(6)
O(4)
4
N2 Byte
J2 Byte
Other
Bytes
Other
Bytes
Interface Selected
O(3)
O(7)
O(5)
3
O(4)
O(8)
O(6)
2
O(7)
D
D
1
O(8)
R
R
0