TXC-04222-AIOG Transwitch Corporation, TXC-04222-AIOG Datasheet - Page 60

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TXC-04222-AIOG

Manufacturer Part Number
TXC-04222-AIOG
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-04222-AIOG

Screening Level
Industrial
Package Type
BGA
Lead Free Status / Rohs Status
Not Compliant
June 2003
TEMx28
TXC-04222
TXC-04222-MB, Ed. 6
DROP BUS INTERFACE
Two SONET/SDH Drop buses are provided, and are labeled A side Drop, and B side Drop. The two drop
buses consist of the following leads:
The Most Significant Bit (MSB) is assigned to AD7 and BD7 in the AD(7-0) and BD(7-0) signals. The MSB is
defined as the first bit received in a SONET/SDH byte (i.e., bit 1 in the SONET/SDH byte). The bus rate is
19.44 kbit/s for STS-3 and STM-1 operation. The STS-1 rate is not supported. The two drop buses are moni-
tored for loss of clock. The alarms are ADLOC (bit 0, 060H) for the A side drop bus and BDLOC (bit 0, 080H)
for the B side.
DROP BUS PARITY SELECTION
The parity selection for two drop buses, A and B Drop, is according to the following table. A parity error for the
A side drop bus is indicated by alarm ADPAR (bit 1, 060H), and for the B side drop bus is indicated by alarm
BDPAR (bit 1, 080H). Other than an alarm indication, no action is taken within the TEMx28.
(bit 0, 019H)
Input data (A/BD(7-0)),
Input parity, (A/BDPAR),
Input C1, J1, and optional V1 marker pulses (A/BDC1J1V1),
Input payload indication (A/BDSPE).
DBPE
0
0
1
1
Proprietary TranSwitch Corporation Information for use Solely by its Customers
(bit 1, 019H)
PDDO
0
1
0
1
DATA SHEET
Odd parity is calculated for the input leads consisting
of data (A/BD(7-0)), clock (A/BDCLK), C1, J1, and V1
marker pulses (A/BDC1J1V1), and the payload indica-
tion (A/BDSPE).
Odd parity is calculated for the data input leads
(A/BD(7-0)).
Even parity is calculated for the input leads consisting
of data (A/BD(7-0)), clock (A/BDCLK), C1, J1, and V1
marker pulses (A/BDC1J1V1), and the payload indica-
tion (A/BDSPE).
Even parity is calculated for the data Input leads
(A/BD(7-0)).
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Drop Bus Parity Selection

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