TXC-04222-AIOG Transwitch Corporation, TXC-04222-AIOG Datasheet - Page 45

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TXC-04222-AIOG

Manufacturer Part Number
TXC-04222-AIOG
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-04222-AIOG

Screening Level
Industrial
Package Type
BGA
Lead Free Status / Rohs Status
Not Compliant
Note: A single TU/VT (number 21/28 in STS-1 number 3) is shown for illustration purposes. The A and B add bus out-
A/BACLK
A/BASPE
ACLK clock period
ACLK duty cycle, t
AC1J1V1 setup time before ACLK
AC1J1V1 hold time after ACLK
ASPE setup time before ACLK
ASPE hold time after ACLK
A(7-0)/APAR data /parity out valid delay from ACLK
A(7-0)/APAR data /parity to tristate delay from ACLK
ADD add indicator delayed from ACLK
A(7-0)/APAR data /parity out tristate to driven delay
from ACLK
Note: All output times are measured with the specified load capacitance.
A/BAC1J1V1
(Input)
A/BA(7-0)
A/BAPAR
(Output)
A/BADD
(Output)
(Input)
(Input)
puts are delayed an additional clock cycle from their respective add bus timing inputs when control bit ABOD (bit
1, 03BH) is written with a 1.
t
SU(1)
Proprietary TranSwitch Corporation Information for use Solely by its Customers
Figure 20. STM-1 VC-4 A/B Add Bus Signals, Timing Derived from Add Bus
C1(1)
t
PWH
H(1)
Parameter
t
/t
PWH
CYC
t
CYC
t
SU(2)
t
H(2)
DATA SHEET
- 45 of 246 -
t
t
t
OD(1)
OD(4)
OD(2)
Symbol
t
t
t
t
t
t
t
t
t
OD(2)
OD(3)
OD(1)
OD(4)
SU(1)
SU(2)
CYC
H(1)
H(2)
J1
Selected
TU/VT
Load
50pF
50pF
50pF
t
OD(3)
Min
5.0
5.0
5.0
5.0
4.0
4.0
4.0
4.0
40
V1
51.44
Typ
Occurs every four frames
50
when enabled
TXC-04222-MB, Ed. 6
Max
TXC-04222
60
21
15
17
15
TEMx28
June 2003
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
%

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