TXC-04222-AIOG Transwitch Corporation, TXC-04222-AIOG Datasheet - Page 200

• Manufacturer Part Number: TXC-04222-AIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-04222-AIOG

• Screening Level: Industrial
• Package Type: BGA
• Lead Free Status / Rohs Status: Not Compliant

June 2003
TEMx28
TXC-04222
TXC-04222-MB, Ed. 6
Address
X+100
X+101
(cont.)
7-6
Bit
1
0
5
4
3
2
1
0
Proprietary TranSwitch Corporation Information for use Solely by its Customers
LTBnFFE
LTAnFFE
LCnOOL
LTnLOC
Symbol
LTnLOS
TnLOC
LTnAIS
TnLOS
Transmit Channel n Loss Of Signal Alarm: The loss of signal detector
is enabled for the rail interface only. A DS1 Loss Of Signal is declared
when there are no signal transitions detected on the positive rail and the
negative rail for a period of 175 +/- 75 consecutive pulse positions.
Recovery occurs when the average pulse density of at least 12.5%
occurs over a period of 175 +/- 75 consecutive pulse positions.
A Loss Of Signal alarm for the E1 line rate alarm is declared when there
are no signal transitions detected on the positive rail and the negative
rail for a period of 256 consecutive pulse positions. Recovery occurs
when there are at least 32 transitions counted for 256 consecutive pulse
positions.
When the NRZ interface is selected, a external loss of signal may be
inputted using the negative rail lead when control bit EXnLOS is a 1. The
input sense is determined by control bit EXnLOSP. When control bit
EXnLOSP is a 1, the loss of signal indication should be active high.
Transmit Channel n Loss Of Clock Alarm: A 1 indicates that the trans-
mit clock (TCIn) for port n has stuck high or low for 6 or more clock
cycles. Recovery occurs on the first clock transition.
Not used:
Transmit Channel n Line AIS Latched Alarm Indication: This bit posi-
tion latches for a transmit line AIS alarm indication. This bit is set on
either a positive transition, negative transition or positive and negative
alarm transition. This bit is cleared on a read cycle.
Transmit Channel n B Side Add Bus FIFO Latched Alarm Indication:
This bit position latches for a transmit B side Add Bus FIFO alarm indica-
tion. This bit is set on either a positive transition, negative transition or
positive and negative alarm transition. This bit is cleared on a read cycle.
Transmit Channel n A Side Add Bus FIFO Latched Alarm Indication:
This bit position latches for a transmit A side Add Bus FIFO alarm indica-
tion. This bit is set on either a positive transition, negative transition or
positive and negative alarm transition. This bit is cleared on a read cycle.
Channel n Test Analyzer Out Of Lock Latched Alarm: This bit posi-
tion latches for a PRBS analyzer out of lock alarm indication. This bit is
set on either a positive transition, negative transition or positive and neg-
ative alarm transition. This bit is cleared on a read cycle. Note that the
only resets which operate on this bit are the RESET lead and the soft-
ware reset (RESETH).
Transmit Channel n Loss Of Signal Latched Alarm Indication: This
bit position latches for a transmit loss of signal alarm. This bit is set on
either a positive transition, negative transition or positive and negative
alarm transition. This bit is cleared on a read cycle.
Transmit Channel n Loss Of Clock Latched Alarm Indication: This
bit position latches for a transmit loss of clock alarm indication. This bit is
set on either a positive transition, negative transition or positive and neg-
ative alarm transition. This bit is cleared on a read cycle.
DATA SHEET
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