TXC-04222-AIOG Transwitch Corporation, TXC-04222-AIOG Datasheet - Page 76

• Manufacturer Part Number: TXC-04222-AIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-04222-AIOG

• Screening Level: Industrial
• Package Type: BGA
• Lead Free Status / Rohs Status: Not Compliant

June 2003
TEMx28
TXC-04222
TXC-04222-MB, Ed. 6
Loss Of Signal Detection
The rail interface only is monitored for a loss of signal. A loss of signal alarm (TnLOS) for the DS1 line rate is
declared when no transitions are detected on the positive and negative rail leads for 175 +/- 75 consecutive
pulse positions. Recovery occurs when the average pulse density of at least 12.5% occurs over 175 +/- 75
pulse positions.
A loss of signal alarm for the E1 line rate is declared when no transitions are detected on the positive and neg-
ative rail leads for 256 consecutive pulse periods. Recovery occurs when there are at least 32 transitions
counted on the positive and negative rail leads for 256 consecutive clock cycles.
Clock Inversion
The transmit data for each of the Rail and NRZ interfaces can be clocked in on either negative or positive tran-
sitions of the input clock for each channel. When control bit TnCLKI (bit 3, X+002H) is a 0, transmit data is
clocked in negative transitions of the input clock. When a 1 is written to this control bit, data is clocked in on
positive transitions of the clock.
For the VT/TU interface selection, when control bit TnCLKI is set to 0, the framing pulses are clocked out posi-
tive transitions of the output clock, while data is clocked in on negative transitions of the clock. When control bit
TnCLKI is set to 1, the framing pulses are clocked out negative transitions of the output clock, while data is
clocked in on positive transitions of the clock.
NRZ Data Inversion
An option is provided which enables the data stream to be inverted when the NRZ interface only is selected
independently in both the receive and transmit directions. When control bit TnNRZP (bit 5, X+002H) is set to 1,
the NRZ data stream will be inverted.
LINE AIS DETECTION
The transmit NRZ and Rail line signals are monitored for line AIS. A line AIS condition is defined as an all ones
unframed signal for both the DS1 and E1 line rates. A line AIS alarm (TnAIS) for the DS1 line rate is declared
when 99.9% or more ones are detected in the received signal for a period of 48 ms. Recovery occurs when the
receive signal has fewer than 99.9% of ones in a 48 ms period.
An AIS alarm for the E1 rate is declared when the signal has two or less zeros in each of two consecutive dou-
ble frame period (four frames). Recovery occurs when each of two consecutive double frame periods contain
three or more zeros.
LINE AIS GENERATION
The TEMx28 provides the ability to generate a line AIS signal on a per channel basis. Line AIS for the DS1
(1544 kbit/s) and for the E1 (2048 kbit/s) line rate is defined as an unframed all ones signal. The following is a
list of alarms and enable bits for controlling the insertion of transmit line AIS.
- When control bit TnAISE is a 1 and any of the following alarms occur:
- When control bit TnAISE is a 0:
Note: When control bit TnAISE is a 0 and the Transmit Loss of Clock (TnLOC) alarm occurs, transmit line AIS
may be generated regardless of the state of control bit TnSAIS.
- Transmit Loss Of Clock (TnLOC)
- Transmit Loss Of Signal (TnLOS) when the Rail interface is selected
- External Loss Of Signal (TnLOS) when the NRZ interface is selected and control bit EXnLOS is a 1
- When control bit TnSAIS is a 1
- When control bit TnSAIS is a 1
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DATA SHEET
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