ST7LITE49K2 STMicroelectronics, ST7LITE49K2 Datasheet - Page 120

• Manufacturer Part Number: ST7LITE49K2
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST7LITE49K2

• 8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance: 10K write/erase cycles guaranteed Data retention
• 256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55 °C.
• Clock Sources: Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow

On-chip peripherals
Note:
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Input capture
In this section, the index, i, may be 1 or 2 because there are two input capture functions in
the 16-bit timer.
The two input capture 16-bit registers (IC1R and IC2R) are used to latch the value of the
free-running counter after a transition detected by the ICAPi pin (see below).
ICiR register is a read-only register.
The active transition is software programmable through the IEDGi bit of control registers
(CRi).
Timing resolution is one count of the free running counter: (
Procedure
To use the input capture function, select the following in the CR2 register:
●
●
Select the following in the CR1 register:
●
●
When an input capture occurs:
●
●
●
Clearing the input capture interrupt request (that is, clearing the ICFi bit) is done in two
steps:
1.
2.
After reading the ICiHR register, transfer of input capture data is inhibited and ICFi is never
set until the ICiLR register is also read.
The ICiR register contains the free running counter value which corresponds to the most
recent input capture.
The two input capture functions can be used together even if the timer also uses the two
output compare functions.
In One Pulse mode and PWM mode only the input capture 2 can be used.
The alternate inputs (ICAP1 and ICAP2) are always directly connected to the timer. So any
transitions on these pins activate the input capture function. Moreover if one of the ICAPi pin
is configured as an input and the second one as an output, an interrupt can be generated if
Select the timer clock (CC[1:0]).
Select the edge of the active transition on the ICAP2 pin with the IEDG2 bit (the ICAP2
pin must be configured as floating input).
Set the ICIE bit to generate an interrupt after an input capture coming from either the
ICAP1 pin or the ICAP2 pin
Select the edge of the active transition on the ICAP1 pin with the IEDG1 bit (the
ICAP1pin must be configured as floating input).
The ICFi bit is set
The ICiR register contains the value of the free running counter on the active transition
on the ICAPi pin (see
A timer interrupt is generated if the ICIE bit is set and the I bit is cleared in the CC
register. Otherwise, the interrupt remains pending until both conditions become true.
By reading the SR register while the ICFi bit is set.
By accessing (reading or writing) the ICiLR register.
ICiR
Figure
61).
ICiHR
MSB
f
CPU
/
CC[1:0]).
ICiLR
LSB
ST7LITE49K2