ST7LITE49K2 STMicroelectronics, ST7LITE49K2 Datasheet - Page 132

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ST7LITE49K2

Manufacturer Part Number
ST7LITE49K2
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7LITE49K2

8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance
10K write/erase cycles guaranteed Data retention
256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55 °C.
Clock Sources
Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow

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On-chip peripherals
132/245
Bit 1 = IEDG1 Input edge 1
Bit 0 = OLVL1 Output level 1
Timer A
Reset value: 0000 0000 (00h)
Bit 7 = OC1E Output compare 1 pin enable
Bit 6 = 0C2E Output compare 2 pin enable
Bit 5 = OPM One pulse mode
Bit 4 = PWM Pulse width modulation
Bits 3:2 CC[1:0] Clock control
OC1E
This bit determines which type of level transition on the ICAP1 pin triggers the capture.
0: A falling edge triggers the capture
1: A rising edge triggers the capture
The OLVL1 bit is copied to the OCMP1 pin whenever a successful comparison occurs
with the OC1R register and the OC1E bit is set in the CR2 register.
This bit is used only to output the signal from the timer on the OCMP1 pin (OLV1 in
output compare mode, both OLV1 and OLV2 in PWM and one-pulse mode). Whatever
the value of the OC1E bit, the output compare 1 function of the timer remains active.
0: OCMP1 pin alternate function disabled (I/O pin free for general-purpose I/O)
1: OCMP1 pin alternate function enabled
This bit is used only to output the signal from the timer on the OCMP2 pin (OLV2 in
output compare mode). Whatever the value of the OC2E bit, the output compare 2
function of the timer remains active.
0: OCMP2 pin alternate function disabled (I/O pin free for general-purpose I/O)
1: OCMP2 pin alternate function enabled
0: One pulse mode is not active
1: One pulse mode is active, the ICAP1 pin can be used to trigger one pulse on
the OCMP1 pin; the active transition is given by the IEDG1 bit. The length of
the generated pulse depends on the contents of the OC1R register.
0: PWM mode is not active
1: PWM mode is active, the OCMP1 pin outputs a programmable cyclic signal;
the length of the pulse depends on the value of OC1R register; the period
depends on the value of OC2R register.
The timer clock mode depends on the following bits:
00: Timer clock = f
01: Timer clock = f
7
control register 2 (TACR2)
OC2E
CPU
CPU
OPM
/4
/2
PWM
Read / Write
CC[1:0]
IEDG2
ST7LITE49K2
EXEDG
0

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