ST7LITE49K2 STMicroelectronics, ST7LITE49K2 Datasheet - Page 75

• Manufacturer Part Number: ST7LITE49K2
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST7LITE49K2

• 8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance: 10K write/erase cycles guaranteed Data retention
• 256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55 °C.
• Clock Sources: Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow

ST7LITE49K2
Caution:
10.2.2
Spurious interrupts
When enabling/disabling an external interrupt by setting/resetting the related OR register bit,
a spurious interrupt is generated if the pin level is low and its edge sensitivity includes
falling/rising edge. This is due to the edge detector input which is switched to '1' when the
external interrupt is disabled by the OR register.
To avoid this unwanted interrupt, a "safe" edge sensitivity (rising edge for enabling and
falling edge for disabling) has to be selected before changing the OR register bit and
configuring the appropriate sensitivity again.
In case a pin level change occurs during these operations (asynchronous signal input), as
interrupts are generated according to the current sensitivity, it is advised to disable all
interrupts before and to reenable them after the complete previous sequence in order to
avoid an external interrupt occurring on the unwanted edge.
This corresponds to the following steps:
2. To disable an external interrupt:
Output modes
Setting the DDRx bit selects output mode. Writing to the DR bits applies a digital value to the
I/O through the latch. Reading the DR bits returns the previously stored value.
If an OR bit is available, different output modes can be selected by software: push-pull or
open-drain. Refer to I/O Port Implementation section for configuration.
Table 23.
a)
b)
c)
d)
e)
a)
b)
c)
d)
e)
Set the interrupt mask with the SIM instruction (in cases where a pin level change
could occur)
Select rising edge
Enable the external interrupt through the OR register
Select the desired sensitivity if different from rising edge
Reset the interrupt mask with the RIM instruction (in cases where a pin level
change could occur)
Set the interrupt mask with the SIM instruction SIM (in cases where a pin level
change could occur)
Select falling edge
Disable the external interrupt through the OR register
Select rising edge
Reset the interrupt mask with the RIM instruction (in cases where a pin level
change could occur)
DR
0
1
DR value and output pin status
Push-pull
V
V
OH
OL
Open-drain
Floating
V
OL
I/O ports
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