ST7LITE49K2 STMicroelectronics, ST7LITE49K2 Datasheet - Page 88

• Manufacturer Part Number: ST7LITE49K2
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST7LITE49K2

• 8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance: 10K write/erase cycles guaranteed Data retention
• 256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55 °C.
• Clock Sources: Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow

On-chip peripherals
Note:
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2
3
Figure 41. PWM signal from 0% to 100% duty cycle
Dead time generation
A dead time can be inserted between PWM0 and PWM1 using the DTGR register. This is
required for half-bridge driving where PWM signals must not be overlapped. The non-
overlapping PWM0/PWM1 signals are generated through a programmable dead time by
setting the DTE bit.
DTGR[7:0] is buffered inside so as to avoid deforming the current PWM cycle. The DTGR
effect will take place only after an overflow.
Dead time is generated only when DTE=1 and DT[6:0]
PWM output signals will be at their reset state.
Half Bridge driving is possible only if polarities of PWM0 and PWM1 are not inverted, i.e. if
OP0 and OP1 are not set. If polarity is inverted, overlapping PWM0/PWM1 signals will be
generated.
Dead Time generation does not work at 1msec timebase.
DCRx=FFDh
DCRx=FFEh
DCRx=000h
DCRx=000h
COUNTER
f
COUNTER
FFDh
Dead time
FFEh
ATR= FFDh
FFFh
=
DT 6:0
[
FFDh
]
×
Tcounter1
≠
FFEh
0
.
If DTE is set and DT[6:0]=0,
FFFh
FFDh
ST7LITE49K2
FFEh
t