ST7LITE49K2 STMicroelectronics, ST7LITE49K2 Datasheet - Page 58

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ST7LITE49K2

Manufacturer Part Number
ST7LITE49K2
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7LITE49K2

8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance
10K write/erase cycles guaranteed Data retention
256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55 °C.
Clock Sources
Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow

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0
Interrupts
8.4
Caution:
58/245
Concurrent and nested management
The following
first is called concurrent mode and does not allow an interrupt to be interrupted, unlike the
nested mode in
lowest to the highest: MAIN, IT5, IT4, IT3, IT2, IT1, IT0. The software priority is given for
each interrupt.
A stack overflow may occur without notifying the software of the failure.
Figure 22. Concurrent interrupt management
Figure 23. Nested interrupt management
11 / 10
MAIN
11 / 10
RIM
MAIN
RIM
Figure 22
Figure
IT2
IT3
23. The interrupt hardware priority is given in this order from the
IT1
and
IT2
Figure 23
IT4
IT0
TLI
IT2
show two different interrupt management modes. The
IT4
IT1
IT0
IT4
IT3
IT1
IT5
IT2
10
SOFTWARE
PRIORITY
LEVEL
10
SOFTWARE
PRIORITY
LEVEL
MAIN
MAIN
3
3
3
3
3
3
3/0
3
3
2
1
3
3
3/0
I1
ST7LITE49K2
I1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
1 1
0 0
0 1
1 1
1 1
I0
I0

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