ST7LITE49K2 STMicroelectronics, ST7LITE49K2 Datasheet - Page 128

• Manufacturer Part Number: ST7LITE49K2
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST7LITE49K2

• 8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance: 10K write/erase cycles guaranteed Data retention
• 256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55 °C.
• Clock Sources: Internal trimmable 8 MHz RC oscillator, auto-wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-halt, Auto-wakeup from Halt, Wait and Slow

On-chip peripherals
Note:
128/245
There is a locking mechanism for transferring the OCiR value to the buffer. After a write to
the OCiHR register, transfer of the new compare value to the buffer is inhibited until OCiLR
is also written.
Unlike in output compare mode, the compare function is always enabled in PWM mode.
Procedure
To use pulse width modulation mode:
1.
2.
3.
4.
Figure 68. Pulse width modulation cycle
If OLVL = 1 and OLVL2 = 0 the length of the positive pulse is the difference between the
OC2R and OC1R registers.
If OLVL1 = OLVL2 a continuous signal is seen on the OCMP1 pin.
Load the OC2R register with the value corresponding to the period of the signal using
the formula in the opposite column.
Load the OC1R register with the value corresponding to the period of the pulse if
(OLVL1 = 0 and OLVL2 = 1) using
Select the following in the CR1 register:
Using the OLVL1 bit, select the level to be applied to the OCMP1 pin after a successful
comparison with OC1R register.
Using the OLVL2 bit, select the level to be applied to the OCMP1 pin after a successful
comparison with OC2R register.
Select the following in the CR2 register:
Set OC1E bit: the OCMP1 pin is then dedicated to the output compare 1 function.
Set the PWM bit.
Select the timer clock (CC[1:0])
= OC1R
= OC2R
counter
counter
When
When
(see: Timer A control register 2 (TACR2) on page
Pulse width modulation cycle
Equation
OCMP1 = OLVL2
OCMP1 = OLVL1
Counter is reset
5.
ICF1 bit is set
to FFFCh
ST7LITE49K2
132).