TMPM370FYFG Toshiba, TMPM370FYFG Datasheet - Page 153

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TMPM370FYFG

Manufacturer Part Number
TMPM370FYFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM370FYFG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
256K
Rom Type
Flash
Ram (kbytes)
10K
Number Of Pins
100
Package
LQFP(14x14)
Vcc
5V
Cpu Mhz
80
Ssp (ch) Spi
-
I2c/sio (ch)
-
Uart/sio (ch)
4
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
27
16-bit Timer / Counter
8
Motor / Igbt Control
Vector Engine
Real Time Clock
-
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
-
Hardware Cec Controller
-
Comparators
4
Low-voltage Detector
Y
Etm Hardware Trace
2-bit

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM370FYFG
Manufacturer:
TOSHIBA
Quantity:
1 000
Part Number:
TMPM370FYFG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
TBnFFCR
(0x4001_0xx0)
9.4.1.5
<TBnFF0C1:0>:Controls the timer flip-flop.
<TBnE0T1>:Reverses the timer flip-flop when the up-counter matches the timer register 0 (TBnRG0).
<TBnE1T1>:Reverses the timer flip-flop when the up-counter matches the timer register 1 (TBnRG1).
<TBnC0T1>:Reverses the timer flip-flop when the up-counter value is taken into the capture register 0
<TBnC1T1>:Reverses the timer flip-flop when the up-counter value is taken into the capture register 1
(Note) TBnFFCR register must not be changed during Timer operation TBnRUN<TBRUN>=”1”.
Read/Write
Read/Write
Read/Write
bit Symbol
Read/Write
After reset
bit Symbol
After reset
bit Symbol
After reset
bit Symbol
After reset
10 : Clears TBnFF0 to “0”.
11 :Don’t care
00 : Reverses the value of TBnFF0
01 : Sets TBnFF0 to “1”.
0: TBnFF0
1: TBnFF0
0: TBnFF0
1: TBnFF0
0: TBnFF0
1: TBnFF0
0: TBnFF0
1: TBnFF0
Function
(TBnCP1).
TMRB flip-flop control register (channels 0 through 7)
(TBnCP0).
31
23
15
R
R
R
not reverse
reverse
not reverse
reverse
not reverse
reverse
not reverse
reverse
7
0
0
0
1
“11” is read.
R
TMRBn flip-flop control register (n=0 to 7)
30
22
14
R
R
R
6
1
0
0
0
When the
up-counter
value is
taken into
TBnCP1
TBnC1T1
TBnFF0 reverse trigger
0: Disable trigger
1: Enable trigger
29
21
13
R
R
R
5
0
0
0
0
TMPM370 9-10
When the
up-counter
value is
taken into
TBnCP0
TBnC0T1
28
20
12
R
R
R
4
0
0
0
0
R/W
When the
up-counter
matches
TBnRG1
TBnE1T1
27
19
11
R
R
R
3
0
0
0
0
When the
up-counter
matches
TBnRG0
TBnE0T1
26
18
10
R
R
R
2
0
0
0
0
16-bit Timer/Event Counters
TBnFF0 control
00: Invert
01: Set
10: Clear
11: Don't care
TBnFF0C1 TBnFF0C0
* This is always read
as “11.”
25
17
R
R
9
R
1
0
0
0
1
R/W
24
16
R
R
8
R
0
0
0
0
1
TMPM370

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