TMPM370FYFG Toshiba, TMPM370FYFG Datasheet - Page 162

• Manufacturer Part Number: TMPM370FYFG
• Manufacturer: Toshiba

Specifications of TMPM370FYFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: LQFP(14x14)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

9.5.2
UC is a 16-bit binary counter.
Up-counter (UC)
•
types φT1, φT4 and φT16 of prescaler output clock or the external clock of the TB0IN pin.
•
= “1”, and stops counting and clears counter value if <TB0RUN> = “0”.
•
•
UC source clock, specified by
Counter operation is specified by TB0RUN<TB0RUN>. UC starts counting if <TB0RUN>
1) When a compare match is detected
2) When UC stops
UC stops counting and clears counter value if TB0RUN <TB0RUN> = “0”.
If UC overflow occurs, the INTTB00 overflow interrupt is generated.
By setting TB0MOD<TB0CLE> = “1”, UC is cleared in case the comparator detects a
match between counter value and the value set in TB0RG1. UC operates as a
free-running counter if TB0MOD<TB0CLE> = “0”.
Source clock
Count start/ stop
Timing to clear UC
UC overflow
TMPM370 9-19
TB0MOD<TB0CLK1:0>
, can be selected from either three
16-bit Timer/Event Counters
TMPM370