TMPM370FYFG Toshiba, TMPM370FYFG Datasheet - Page 195

• Manufacturer Part Number: TMPM370FYFG
• Manufacturer: Toshiba

Specifications of TMPM370FYFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: LQFP(14x14)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

10.3.21 Interrupt/Error Generation Timing
RX Interrupts
(Note)
Double Buffer
Configuration
Single Buffer
Buffer
Fig. 10-10 shows the data flow of receive operation and the route of read.
Single Buffer / Double Buffer
RX interrupts are generated at the time depends on the transfer mode and the buffer
configurations, which are given as follows.
FIFO
In use of FIFO, receive interrupt is generated on the condition that the following either
operation and SC0RFC<RFIS > setting are established.
Interrupt conditions are decided by the SCxRFC<RFIS> settings as described in Table
10-5.
Fig. 10-10 Receive Buffer/FIFO Configuration Diagram
Reception completion of all bits of one frame.
Reading FIFO
Interrupts are not generated when an overrun error is occurred.
-
· Around the center of the first stop bit
UART mode
TMPM370 10-24
· Immediately after the raising / falling edge of the last
· Immediately after the raising / falling edge of the last
· On data transfer from the shift register to the buffer
SCLK
(Rising or falling is determined according to
SCxCR<SCLKS> setting.)
by reading buffer.
SCLK
(Rising or falling is determined according to
SC0CR<SCLKS> setting.)
IO interface modes
Serial Channel
TMPM370