TMPM370FYFG Toshiba, TMPM370FYFG Datasheet - Page 194

• Manufacturer Part Number: TMPM370FYFG
• Manufacturer: Toshiba

Specifications of TMPM370FYFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: LQFP(14x14)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

10.3.19 Configurations of Transmit/Receive Buffer
10.3.20 Software reset
Software reset is generated by writing the bits 1 and 0 of SC0MOD2 <SWRST1:0> as “10”
followed by “01”. As a result, SC0MOD0<RXE>, SC0MOD1<TXE>,
SC0MOD2<TBEMP>,<RBFLL>,<TXRUN> of mode registers and SC0CR<OERR>, <PERR>,
<FERR> of control registers and internal circuit is initialized. Other states are maintained.
(SCLK output)
(SCLK input)
I/O Interface
I/O Interface
CPU, the bit is cleared to “0.” If <WBUF> is set to “0,” this bit is insignificant and must not be
used as a status flag.
UART
Transmit buffer
Transmit buffer
Transmit buffer
Receive buffer
Receive buffer
Receive buffer
TMPM370 10-23
<WBUF> = 0
Double
Double
Single
Single
Single
Single
<WBUF> = 1
Double
Double
Double
Double
Double
Double
Serial Channel
TMPM370