TMPM370FYFG Toshiba, TMPM370FYFG Datasheet - Page 41

no-image

TMPM370FYFG

Manufacturer Part Number
TMPM370FYFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM370FYFG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
256K
Rom Type
Flash
Ram (kbytes)
10K
Number Of Pins
100
Package
LQFP(14x14)
Vcc
5V
Cpu Mhz
80
Ssp (ch) Spi
-
I2c/sio (ch)
-
Uart/sio (ch)
4
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
27
16-bit Timer / Counter
8
Motor / Igbt Control
Vector Engine
Real Time Clock
-
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
-
Hardware Cec Controller
-
Comparators
4
Low-voltage Detector
Y
Etm Hardware Trace
2-bit

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM370FYFG
Manufacturer:
TOSHIBA
Quantity:
1 000
Part Number:
TMPM370FYFG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
(1) Exception occurrence
(2) Exception detection
from external interrupt pins or peripheral functions.
condition occurs during instruction execution.
violation to the Fault region.
are used for releasing a standby mode, relevant settings must be made in the clock generator. For
details,refer to “7.5 Interrupts”.
Table 7-1 shows the priority of exceptions. “Configurable” means that you can assign a priority level to that
exception. Memory Management, Bus Fault and Usage Fault exceptions can be enabled or disabled. If a
disabled exception occurs, it is handled as Hard Fault.
Exception sources include instruction execution by the CPU, memory accesses, and interrupt requests
An exception occurs when the CPU executes an instruction that causes an exception or when an error
An exception also occurs by an instruction fetch from the Execute Never (XN) region or an access
An interrupt request is generated from an external interrupt pin or peripheral function. For interrupts that
If multiple exceptions occur simultaneously, the CPU takes the exception with the highest priority.
7.1.2.1
Exception Request and Detection
TMPM370 7-3
TMPM370
Interrupt

Related parts for TMPM370FYFG