TMPM370FYFG Toshiba, TMPM370FYFG Datasheet - Page 246

• Manufacturer Part Number: TMPM370FYFG
• Manufacturer: Toshiba

Specifications of TMPM370FYFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: LQFP(14x14)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

15.3 List of Registers
0x4005-01BC
0x4005-000C
0x4005-001C
0x4005-002C
0x4005-003C
0x4005-0000
0x4005-0004
0x4005-0008
0x4005-0010
0x4005-0014
0x4005-0018
0x4005-0020
0x4005-0024
0x4005-0028
0x4005-0030
0x4005-0034
0x4005-0038
0x4005-0040
0x4005-0174
0x4005-0178
The Vector Engine registers are divided into the following three types:
Address
Address
VE control registers
Common registers
Channel-specific registers
VESCHTASKRUN
VECPURUNTRG
Register Name
Register Name
VETRGMODE
VEERRINTEN
VECOMPEND
VETMPREG0
VETMPREG1
VETMPREG2
VETMPREG3
VETMPREG4
VETMPREG5
VETASKAPP
VEREPTIME
VEACTSCH
VEERRDET
VETADC
VEEN
-
-
-
Table 15-1 List of Registers (1) – VE Control Registers
Table 15-2 List of Registers (2) – Common Registers
Common
Channel
Channel
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
: Vector Engine control registers and temporary registers
: Registers common to both channels
: Computation data and control registers for each channel
Reserved
ADC conversion time (based on PWM clock)
VE enable/disable
Schedule repeat count
Start trigger mode
Error interrupt enable/disable
Error detection
Schedule executing flag/executing task
Reserved
Temporary register
Temporary register
Temporary register
Temporary register
Temporary register
Temporary register
Reserved
CPU start trigger selection
Task selection
Operation schedule selection
VE forced termination
TMPM370 15-5
Description
Description
Vector Engine (VE)
Read/Write
Read/Write
TMPM370
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
W
R
R
R
R