TMPM370FYFG Toshiba, TMPM370FYFG Datasheet - Page 404

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TMPM370FYFG

Manufacturer Part Number
TMPM370FYFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM370FYFG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
256K
Rom Type
Flash
Ram (kbytes)
10K
Number Of Pins
100
Package
LQFP(14x14)
Vcc
5V
Cpu Mhz
80
Ssp (ch) Spi
-
I2c/sio (ch)
-
Uart/sio (ch)
4
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
27
16-bit Timer / Counter
8
Motor / Igbt Control
Vector Engine
Real Time Clock
-
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
-
Hardware Cec Controller
-
Comparators
4
Low-voltage Detector
Y
Etm Hardware Trace
2-bit

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM370FYFG
Manufacturer:
TOSHIBA
Quantity:
1 000
Part Number:
TMPM370FYFG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
TMPM370
20.2.3 Single Boot Mode
In Single Boot mode, the flash memory can be re-programmed by using a program contained in
the TMPM370 on-chip boot ROM. This boot ROM is a masked ROM. When Single Boot mode is
selected upon reset, the boot ROM is mapped to the address region including the interrupt
vector table while the flash memory is mapped to an address region different from it.
Single Boot mode allows for serial programming of the flash memory. Channel 0 of the SIO
(SIO0) of the TMPM370 is connected to an external host controller. Via this serial link, a
programming routine is downloaded from the host controller to the TMPM370 on-chip RAM.
Then, the flash memory is re-programmed by executing the programming routine. The host
sends out both commands and programming data to re-program the flash memory.
Communications between the SIO0 and the host must follow the protocol described later. To
secure the contents of the flash memory, the validity of the application’s password is checked
before a programming routine is downloaded into the on-chip RAM. If password matching fails,
the transfer of a programming routine itself is aborted.
As in the case of User Boot mode, all interrupts including the non-maskable interrupt (NMI) must
be disabled in Single Boot mode while the flash memory is being erased or programmed. In
SingleBoot mode, the boot-ROM programs are executed in Normal mode.
Once re-programming is complete, it is recommended to protect relevant flash blocks from
accidental corruption during subsequent Single-Chip (Normal mode) operations.
−−−−−−−−−−−−
Note : When use Single Boot Mode, it is necessary to reset TMPM370FY from the RESET
terminal.
TMPM370 20-12
Flash Memory Operation

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