TMPM370FYFG Toshiba, TMPM370FYFG Datasheet - Page 190

• Manufacturer Part Number: TMPM370FYFG
• Manufacturer: Toshiba

Specifications of TMPM370FYFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: LQFP(14x14)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

Transmit buffer 2
Transmit buffer 1
10.3.12 Transmit FIFO Buffer
10.3.13 Transmit FIFO Operation
TX FIFO
INTTX0
In addition to the double buffer function already described, data may be stored using the
transmit FIFO buffer. By setting <CNFG> of the SC0FCNF register and <FDPX1:0> of the
SC0MOD1 register, the 4-byte transmit buffer can be enabled. In the UART mode or I/O
interface mode, up to 4 bytes of data may be stored.
If data is to be transmitted with a parity bit in the UART mode, parity check must be performed
on the receive side each time a data frame is received.
TBEMP
TXE
I/O interface mode with SCLK output (normal mode):
Note)
SC0MOD1<6:5>=10: Transfer mode is set to half duplex mode.
SC0FCNF <4:0> = 01011: Inhibits continued transmission after reaching the fill level.
SC0TFC <1:0> = 00: Sets the interrupt to be generated at fill level 0.
SC0TFC <7:6> =11: Clears transmit FIFO and sets the condition of interrupt generation
In this condition, data transmission can be initiated by setting the transfer mode to half
duplex, writing 5 bytes of data to the transmit buffer and transmit FIFO , and setting the
<TXE> bit to “1.” When the last transmit data is moved to the transmit buffer, the transmit
FIFO interrupt is generated. When transmission of the last data is completed, the clock is
stopped and the transmission sequence is terminated.
Data 5
Data 4
Data 3
Data 2
Data 1
Please clear transmission FIFO after setting of the forwarding mode of
SIO (half duplex/full duplex) and permission (SC0FCNF<CNFG>="1") of
FIFO when you use transmission FIFO Buffer.
Fig. 10-8 Transmit FIFO Operation
Data 5
Data 4
Data 3
Data 2
Data 1
TMPM370 10-19
Data 5
Data 4
Data 3
Data 2
Data 4
Data 5
Data 3
Data 5
Data 4
Data 5
Serial Channel
TMPM370