TMPM370FYFG Toshiba, TMPM370FYFG Datasheet - Page 215

• Manufacturer Part Number: TMPM370FYFG
• Manufacturer: Toshiba

Specifications of TMPM370FYFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 256K
• Rom Type: Flash
• Ram (kbytes): 10K
• Number Of Pins: 100
• Package: LQFP(14x14)
• Vcc: 5V
• Cpu Mhz: 80
• Ssp (ch) Spi: -
• I2c/sio (ch): -
• Uart/sio (ch): 4
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 27
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Vector Engine
• Real Time Clock: -
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: 4
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

INTRX0 Interrupt request)
INTRX0 Interrupt request)
SCLK0 input
(<SCLKS>=0
Rising edge mode)
SCLK0 input
(<SCLKS>=1
Falling edge mode)
SCLK0 input
(<SCLKS>=0
Rising edge mode)
SCLK0 input
(<SCLKS>=1
Falling edge mode)
Receive data
read timing
Receive data
read timing
RBFULL
RBFULL
OERR
RXD0
RXD0
(Note) To receive data, SC0MOD <RXE> must always be set to “1” (receive enable) in the
Fig. 10-15 Receive Operation in the I/O Interface Mode (SCLK0 Input Mode)
SCLK output / SCLK input mode.
SCLK input mode
The INTRX receive interrupt is generated each time received data is moved to received
buffer 2.
In the SCLK input mode, receiving double buffering is always enabled, the received frame
can be moved to receive buffer 2 and receive buffer 1 can receive the next frame
successively.
bit 0
bit 0
If data cannot be read from buffer 2
If data is read from buffer 2
TMPM370 10-44
bit 1
bit 1
bit 5
bit 5
bit 6
bit 6
bit 7
bit 7
Serial Channel
bit 0
bit 0
TMPM370