AN2468 Freescale Semiconductor / Motorola, AN2468 Datasheet - Page 19

• Manufacturer Part Number: AN2468
• Description: Understanding the MPC74
• Manufacturer: Freescale Semiconductor / Motorola

MOTOROLA
Denotes Signals
Driven and
Relative to
L3_CLK[0]
MPC7457
L3_DATA[16:23]
L3_DATA[24:31]
Latched
L3_DATA[8:15]
L3_DATA[0:7]
SRAM Input Setup
Time Requirement
Figure 13. Example 1: Input Hold Time Violation on L3_DATA[8:15] and L3_DP[1]
L3_CLK[0]
Figure 12. Example 1: Short Traces on L3_DATA[8:15] and L3_DP[1]
Understanding the MPC7450 Family L3 Cache Hardware Interface
{L3DATA[0:7],
{L3DATA[8:15], L3DP[1]}
{L3DATA[16:23],
{L3DATA[24:31], L3DP[3]}
L3_ECHO_CLK[0]
L3_ECHO_CLK[1]
Freescale Semiconductor, Inc.
Data 0
L3ADDR[17:0]
L3_CNTL[0]
L3_CNTL[1]
L3_CLK[0]
{L3DATA[32:63], L3DP[4:7]}
For More Information On This Product,
Data 0
L3_ECHO_CLK[2:3]
Data 0
Data 0
L3_CLK[1]
L3DP[0]}
L3DP[2]}
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Data 1
SRAM Input Hold
Time Requirement
Data 1
Data 1
Data 1
Data 2
Data 2
Data 2
Data 2
Data 3
Adjusting AC Timing Margins
SRAM AC Timing
Violation
Data 3
Data 3
Data 3
D[0:8]
B1
B2
D[9:17]
D[18:25]
SA[17:0]
D[26:35]
CQ
CK
CQ
SRAM 1
SRAM 0
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