ade7880 Analog Devices, Inc., ade7880 Datasheet - Page 100

• Manufacturer Part Number: ade7880
• Description: Polyphase Multifunction Energy Metering Ic With Harmonic Monitoring
• Manufacturer: Analog Devices, Inc.

ADE7880
Bit
Location
2
4:3
5
7:6
Table 50. CONFIG3 Register (Address 0xEA00)
Bit
Location
0
1
2
3
4
7:5
Table 51. HCONFIG Register (Address 0xE900)
Bit
Location
0
2:1
Bit Mnemonic
HGAP
HXFER[1:0]
HSAPOL
Reserved
Bit Mnemonic
HPFEN
LPFSEL
INSEL
ININTEN
Reserved
Reserved
Bit Mnemonic
HRCFG
HPHASE
Default Value
0
00
0
00
Default Value
1
0
0
0
1
000
Default Value
0
00
Description
When HPFEN = 1, then all high-pass filters in voltage and current channels are enabled.
When HPFEN=0, then all high-pass filters are disabled.
When LPFSEL=0, the LPF in the total active power data path introduces a settling time of
650msec.
When LPFSEL=1, the LPF in the total active power data path introduces a settling time of
1300msec.
When INSEL=0, the register NIRMS contains the rms value of the neutral current.
When INSEL=1, the register NIRMS contains the rms value of ISUM, the instantaneous value
of the sum of all 3 phase currents, IA, IB and IC.
This bit manages the integrator in the neutral current channel.
If ININTEN=0, then the integrator in the neutral current channel is disabled.
If ININTDIS=1, then the integrator in the neutral channel is enabled.
The integrators in the phase currents channels are managed by Bit 0 (INTEN) of CONFIG
register.
Reserved. This bit should be maintained at 1 for proper operation.
Reserved. These bits do not manage any functionality.
Description
0: no gap is introduced between packages.
1: a gap of seven HCLK cycles is introduced between packages.
00 = HSDC transmits sixteen 32-bit words in the following order: IAWV, VAWV, IBWV, VBWV, ICWV,
VCWV, INWV, AVA, BVA, CVA, AWATT, BWATT, CWATT, AFVAR, BFVAR, and CFVAR.
01 = HSDC transmits seven instantaneous values of currents and voltages: IAWV, VAWV,
IBWV, VBWV, ICWV, VCWV, and INWV.
10 = HSDC transmits nine instantaneous values of phase powers: AVA, BVA, CVA, AWATT,
BWATT, CWATT, AFVAR, BFVAR, and CFVAR.
11 = reserved. If set, the ADE7880 behaves as if HXFER[1:0] = 00.
0: SS /has output pin ihasctive low.
1: SS /HSA output pin is active high.
Reserved. These bits do not manage any functionality.
Description
When this bit is cleared to 0, the bit 19 (HREADY) interrupt in MASK0 register is triggered
after a certain delay period. The delay period is set by bits HSTIME. The update frequency
after the settling time is determined by bits HRATE.
When this bit is set to 1, the bit 19 (HREADY) interrupt in MASK0 register is triggered starting
immediately after the harmonic calculations block has been setup. The update frequency is
determined by bits HRATE.
These bits decide what phase or neutral is analyzed by the harmonic calculations block.
00=Phase A voltage and current
01=Phase B voltage and current
10=Phase C voltage and current
11=Neutral current
Rev. PrE| Page 100 of 103
Preliminary Technical Data