ade7880 Analog Devices, Inc., ade7880 Datasheet - Page 42

• Manufacturer Part Number: ade7880
• Description: Polyphase Multifunction Energy Metering Ic With Harmonic Monitoring
• Manufacturer: Analog Devices, Inc.

ADE7880
Fundamental Active Power Calculation
The ADE7880 computes the fundamental active power using
a proprietary algorithm that requires some initializations function
of the frequency of the network and its nominal voltage measured
in the voltage channel. Bit 14 (SELFREQ) in the COMPMODE
register must be set according to the frequency of the network in
which the ADE7880 is connected. If the network frequency is
50 Hz, clear this bit to 0 (the default value). If the network fre-
quency is 60 Hz, set this bit to 1. In addition, initialize the VLEVEL
24-bit signed register with a positive value based on the
following expression:
where:
U
are at full scale.
U
As stated in the Current Waveform Gain Registers section, the
serial ports of the ADE7880 work on 32-, 16-, or 8-bit words
and the DSP works on 28 bits. Similar to the registers presented
in Figure 18, the VLEVEL 24-bit signed register is accessed as a
32-bit register with four most significant bits padded with 0s
and sign extended to 28 bits.
Table 13 presents the settling time for the fundamental active
power measurement.
Table 13. Settling Time for Fundamental Active Power
63% PMAX
375 ms
Active Power Gain Calibration
Note that the average active power result from the LPF2 output
in each phase can be scaled by ±100% by writing to the phase’s
to Filter Instantaneous Power in Each Phase when LPFSEL bit of CONFIG3 is 1
FS
n
is the rms nominal value of the phase voltage.
is the rms value of the phase voltages when the ADC inputs
VLEVEL
Figure 48. Frequency Response of the LPF Used
=
U
U
FS
n
×
4 ×
Input Signals
10
6
100% PMAX
875 ms
Rev. PrE | Page 42 of 103
(21)
watt gain 24-bit register (APGAIN, BPGAIN, CPGAIN,). The
xPGAIN registers are placed on datapaths of all powers
computed by the ADE7880: total active powers, fundamental
active and reactive powers and apparent powers. This is possible
because all power datapaths have identical overall gains.
Therefore, to compensate the gain errors in various powers
datapaths it is sufficient to analyze only one power data path,
for example the total active power, calculate the correspondent
APGAIN, BPGAIN and CPGAIN registers and all the power
datapaths are gain compensated.
The power gain registers are twos complement, signed registers
and have a resolution of 2
mathematically the function of the power gain registers.
The output is scaled by −50% by writing 0xC00000 to the watt
gain registers, and it is increased by +50% by writing 0x400000
to them. These registers are used to calibrate the active, reactive
and apparent power (or energy) calculation for each phase.
As stated in the Current Waveform Gain Registers section, the
serial ports of the ADE7880 work on 32-, 16-, or 8-bit words,
and the DSP works on 28 bits. Similar to registers presented in
Figure 18, APGAIN, BPGAIN, CPGAIN 24-bit signed registers
are accessed as 32-bit registers with the four MSBs padded with
0s and sign extended to 28 bits.
Active Power Offset Calibration
The ADE7880 incorporates a watt offset 24-bit register on each
phase and on each active power. The AWATTOS, BWATTOS,
and CWATTOS registers compensate the offsets in the total
active power calculations, and the AFWATTOS, BFWATTOS,
and CFWATTOS registers compensate offsets in the fundamental
active power calculations. These are signed twos complement,
24-bit registers that are used to remove offsets in the active
power calculations. An offset can exist in the power calculation
due to crosstalk between channels on the PCB or in the chip
itself. One LSB in the active power offset register is equivalent
to 1 LSB in the active power multiplier output. With full-scale
current and voltage inputs, the LPF2 output is PMAX
=27,059,678. At −80 dB down from the full scale (active power
scaled down 10
register represents0.0369% of PMAX.
As stated in the Current Waveform Gain Registers section, the
serial ports of the ADE7880 work on 32-, 16-, or 8-bit words
and the DSP works on 28 bits. Similar to registers presented in
Figure 18, the AWATTOS, BWATTOS, CWATTOS,
AFWATTOS, BFWATTOS, and CFWATTOS 24-bit signed
registers are accessed as 32-bit registers with the four MSBs
padded with 0s and sign extended to 28 bits.
LPF
Average
2
Output
Power
4
times), one LSB of the active power offset
×
Preliminary Technical Data
Data



1
+
−23
Power
=
/LSB. Equation 22 describes
Gain
2
23
Re
gister



(22)