ade7880 Analog Devices, Inc., ade7880 Datasheet - Page 49

• Manufacturer Part Number: ade7880
• Description: Polyphase Multifunction Energy Metering Ic With Harmonic Monitoring
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
The maximum value that can be stored in the var-hour
accumulation register before it overflows is 2
0x7FFFFFFF. The integration time is calculated as
Energy Accumulation Modes
The fundamental reactive power accumulated in each var-hour
accumulation 32-bit register (AFVARHR, BFVARHR, and
CFVARHR) depends on the configuration of Bits[5:4]
(CONSEL[1:0]) in the ACCMODE register, in correlation with
the watt-hour registers. The different configurations are
described in Table 18. Note that IA’/IB’/IC’ are the phase-
shifted current waveforms.
Table 18. Inputs to Var-Hour Accumulation Registers
CONSEL[1:0]
00
01
10
11
Note: In 3-phase three wire case (CONSEL[1:0]=01), the
ADE7880 computes the rms value of the line voltage between
phases A and C and stores the result into BVRMS register (see
Voltage RMS in 3-phase three wire delta configurations for
more details). Consequently, the ADE7880 computes powers
associated with phase B that do not have physical meaning. To
avoid any errors in the frequency output pins CF1, CF2 or CF3
related to these powers, disable the contribution of phase B to
the energy to frequency converters by setting bits
TERMSEL1[1] or TERMSEL2[1] or TERMSEL3[1] to 0 in
COMPMODE register (See Energy-to-Frequency Conversion
for more details).
Bits[3:2] (VARACC[1:0]) in the ACCMODE register determine
how the reactive power is accumulated in the var-hour registers
and how the CF frequency output can be generated function of
total and fundamental active and reactive powers. See the Energy-
to-Frequency Conversion section for details.
Line Cycle Reactive Energy Accumulation Mode
As mentioned in the Line Cycle Active Energy Accumulation
Mode section, in line cycle energy accumulation mode, the
energy accumulation can be synchronized to the voltage
channel zero crossings so that reactive energy can be
accumulated over an integral number of half line cycles.
In this mode, the ADE7880 transfers the reactive energy
accumulated in the 32-bit internal accumulation registers into
the xFVARHR registers after an integral number of line cycles,
Time = 0x7FFF,FFFF × 14.531 μs = 8 hr 40 min 6 sec (39)
VA × IA’
VA × IA’
VA × IA’
VA × IA’
AFVARHR
VB × IB’
VB x IB’
VB= VA − VC
(See Note)
VB × IB’
VB = −VA − VC
VB × IB’
VB = −VA
BFVARHR
31
− 1 or
VC × IC’
VC × IC’
VC x IC’
VC × IC’
CFVARHR
Rev. PrE | Page 49 of 103
as shown in Figure 53. The number of half line cycles is
specified in the LINECYC register.
The line cycle reactive energy accumulation mode is activated by
setting Bit 1 (LVAR) in the LCYCMODE register. The
fundamental reactive energy accumulated over an integer
number of half line cycles or zero crossings is available in the var-
hour accumulation registers after the number of zero crossings
specified in the LINECYC register is detected. When using the
line cycle accumulation mode, Bit 6 (RSTREAD) of the
LCYCMODE register should be set to Logic 0 because a read
with the reset of var-hour registers is not available in this mode.
Phase A, Phase B, and Phase C zero crossings are, respectively,
included when counting the number of half line cycles by
setting Bits[5:3] (ZXSEL[x]) in the LCYCMODE register. Any
combination of the zero crossings from all three phases can be
used for counting the zero crossing. Select only one phase at a
time for inclusion in the zero-crossings count during calibration.
For details on setting the LINECYC register and the Bit 5
(LENERGY) in the MASK0 interrupt mask register associated
with the line cycle accumulation mode, see the Line Cycle
Active Energy Accumulation Mode section.
APPARENT POWER CALCULATION
Apparent power is defined as the maximum active power that
can be delivered to a load. One way to obtain the apparent
power is by multiplying the voltage rms value by the current
rms value (also called the arithmetic apparent power)
where:
S is the apparent power.
V rms and I rms are the rms voltage and current, respectively.
The ADE7880 computes the arithmetic apparent power on each
phase. Figure 54 illustrates the signal processing in each phase
for the calculation of the apparent power in the ADE7880.
Fundamental Reactive
Power Algorithm
Figure 53. Line Cycle Fundamental Reactive Energy Accumulation Mode
Output from
S = V rms × I rms
ZERO CROSSING
ZERO CROSSING
ZERO CROSSING
DETECTION
DETECTION
DETECTION
(PHASE A)
(PHASE B)
(PHASE C)
LCYCMODE[7:0]
LCYCMODE[7:0]
LCYCMODE[7:0]
ZXSEL[0] in
ZXSEL[1] in
ZXSEL[2] in
APGAIN
AFVAROS
Σ
Σ
34
VARTHR
THRESHOLD
Accumulator
27
Internal
26
0
0
LINECYC[15:0]
CALIBRATION
CONTROL
Σ
ADE7880
AFVARHR[31:0]
32 bit register
(39)