ade7880 Analog Devices, Inc., ade7880 Datasheet - Page 88

• Manufacturer Part Number: ade7880
• Description: Polyphase Multifunction Energy Metering Ic With Harmonic Monitoring
• Manufacturer: Analog Devices, Inc.

ADE7880
Address
0xEA05-
0xEA07
0xEA08
0xEA09
0xEA0A
0xEA0B-
0xEBFE
0xEBFF
0xEC00
0xEC01
1
2
3
4
Table 31. IPEAK Register (Address 0xE500)
Bit Location
23:0
24
25
26
31:27
Table 32. VPEAK Register (Address 0xE501)
Bit Location
23:0
24
25
26
31:27
Table 33. STATUS0 Register (Address 0xE502)
Bit
Location
0
1
2
R is read, and W is write.
32 ZP = 24- or 20-bit signed or unsigned register that is transmitted as a 32-bit word with 8 or 12 MSBs, respectively, padded with 0s. 32 SE = 24-bit signed register that
is transmitted as a 32-bit word sign extended to 32 bits. 16 ZP = 10-bit unsigned register that is transmitted as a 16-bit word with six MSBs padded with 0s.
U is unsigned register, and S is signed register in twos complement format.
N/A is not applicable.
Bit Mnemonic
AEHF
FAEHF
Reserved
Bit Mnemonic
VPEAKVAL[23:0]
VPPHASE[0]
VPPHASE[1]
VPPHASE[2]
Bit Mnemonic
IPEAKVAL[23:0]
IPPHASE[0]
IPPHASE[1]
IPPHASE[2]
Register Name
Reserved
HX
HY
HZ
Reserved
Reserved
LPOILVL
CONFIG2
Default Value
0
0
0
Default Value
0
0
0
0
00000
Default Value
0
0
0
0
00000
R/W
R/W
R/W
R/W
R/W
R/W
1
Bit
Length
8
8
8
8
8
8
8
8
Description
When this bit is set to 1, it indicates that Bit 30 of any one of the total active energy
registers (AWATTHR, BWATTHR, or CWATTHR) has changed.
When this bit is set to 1, it indicates that Bit 30 of any one of the fundamental active
energy registers, FWATTHR, BFWATTHR, or CFWATTHR, has changed.
This bit is always 0.
Description
These bits contain the peak value determined in the current channel.
When this bit is set to 1, Phase A current generated IPEAKVAL[23:0] value.
When this bit is set to 1, Phase B current generated IPEAKVAL[23:0] value.
When this bit is set to 1, Phase C current generated IPEAKVAL[23:0] value.
These bits are always 0.
Description
These bits contain the peak value determined in the voltage channel.
When this bit is set to 1, Phase A voltage generated VPEAKVAL[23:0] value.
When this bit is set to 1, Phase B voltage generated VPEAKVAL[23:0] value.
When this bit is set to 1, Phase C voltage generated VPEAKVAL[23:0] value.
These bits are always 0.
Bit Length
During
Communication
8
8
8
8
8
8
8
8
Rev. PrE | Page 88 of 103
2
Type
U
U
U
U
U
3
Default
Value
3
5
7
0x07
0x00
4
Preliminary Technical Data
Description
Reserved. These registers are
always 0.
Selects an index of the harmonic
monitored by the harmonic
computations.
Selects an index of the harmonic
monitored by the harmonic
computations.
Selects an index of the harmonic
monitored by the harmonic
computations.
Reserved. These registers are
always 0.
This address can be used in
manipulating the SS /HSA pin when
SPI is chosen as the active port. See
the Serial Interfaces section for
details.
Overcurrent threshold used during
PSM2 mode. SeeTable 52 in which
the register is detailed.
Configuration register used during
PSM1 mode. SeeTable 53.