ade7880 Analog Devices, Inc., ade7880 Datasheet - Page 47

• Manufacturer Part Number: ade7880
• Description: Polyphase Multifunction Energy Metering Ic With Harmonic Monitoring
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
Table 16. Settling Time for Fundamental Reactive Power
63% PMAX
375 ms
Fundamental Reactive Power Gain Calibration
The average fundamental reactive power from the LPF output in
each phase can be scaled by ±100% by writing to one of the phase’s
VAR gain 24-bit register (APGAIN, BPGAIN, or CPGAIN). Note
that these registers are the same gain registers used to
compensate the other powers computed by the ADE7880.
Please see Active Power Gain Calibration section for details on
these registers.
Fundamental Reactive Power Offset Calibration
The ADE7880 provides a fundamental reactive power offset
register on each phase. AFVAROS, BFVAROS, and CFVAROS
Sign of Fundamental Reactive Power Calculation
Note that the fundamental reactive power is a signed
calculation.
Table 17 summarizes the relationship between the phase difference
between the voltage and the current and the sign of the resulting
reactive power calculation.
The ADE7880 has sign detection circuitry for reactive power
calculations that can monitor the fundamental reactive powers.
As described in the Fundamental Reactive Energy Calculation
section, the reactive energy accumulation is executed in two
stages. Every time a sign change is detected in the energy
accumulation at the end of the first stage, that is, after the energy
accumulated into the internal accumulator reaches the VARTHR
register threshold, a dedicated interrupt is triggered. The sign of
each phase reactive power can be read in the PHSIGN register.
Bits[12:10] (REVFRPC, REVFRPB, and REVFRPA,
respectively) in the STATUS0 register are set when a sign
change occurs in the fundamental reactive power.
v
i
A
A
APHCAL
AVGAIN
AIGAIN
Input Signals
CONFIG3[0]
CONFIG3[0]
HPFEN bit
HPFEN bit
HPF
100% PMAX
875 ms
Integrator
Digital
Digital Signal Processor
Fundamental
Figure 52. Fundamental Reactive Energy Accumulation
Algorithm
Reactive
Power
APGAIN
Rev. PrE | Page 47 of 103
AFVAROS
Σ
registers compensate the offsets in the fundamental reactive
power calculations. These are signed twos complement, 24-bit
registers that are used to remove offsets in the fundamental
reactive power calculations. An offset can exist in the power
calculation due to crosstalk between channels on the PCB or in
the chip itself. The resolution of the registers is the same as for
the active power offset registers (see the Active Power Offset
Calibration section).
As stated in the Current Waveform Gain Registers section, the
serial ports of the ADE7880 work on 32-, 16-, or 8-bit words
and the DSP works on 28 bits. Similar to the registers presented
in Figure 18, the AFVAROS, BFVAROS, and CFVAROS 24-bit
signed registers are accessed as 32-bit registers with the four
MSBs padded with 0s and sign extended to 28 bits.
Bits[6:4] (CFVARSIGN, BFVARSIGN, and AFVARSIGN,
respectively) in the PHSIGN register are set simultaneously with
the REVFRPC, REVFRPB, and REVFRPA bits. They indicate the
sign of the fundamental reactive power. When they are 0, the
reactive power is positive. When they are 1, the reactive power
is negative.
Bit REVFRPx of the STATUS0 register and Bit xFVARSIGN in
the PHSIGN register refer to the reactive power of Phase x.
Setting Bits[12:10] in the MASK0 register enables the
REVFRPC, REVFRPB, and REVFRPA interrupts, respectively.
If enabled, the IRQ0 pin is set low and the status bit is set to 1
whenever a change of sign occurs. To find the phase that
triggered the interrupt, the PHSIGN register is read
immediately after reading the STATUS0 register. Next, the status
bit is cleared and the
STATUS0 register with the corresponding bit set to 1.
Table 17. Sign of Reactive Power Calculation
Φ
Between 0 to +180
1
2
:
4
AFVAR
Σ
34
VARTHR
IRQ0 pin is set to high by writing to the
THRESHOLD
Accumulator
Sign of Reactive Power
Positive
27
Internal
26
0
0
Σ
REVFRPA bit in
STATUS0[31:0]
ADE7880
AFVARHR[31:0]
32 bit register