ade7880 Analog Devices, Inc., ade7880 Datasheet - Page 52

• Manufacturer Part Number: ade7880
• Description: Polyphase Multifunction Energy Metering Ic With Harmonic Monitoring
• Manufacturer: Analog Devices, Inc.

ADE7880
associated with phase B that do not have physical meaning. To
avoid any errors in the frequency output pins CF1, CF2 or CF3
related to these powers, disable the contribution of phase B to
the energy to frequency converters by setting bits
TERMSEL1[1] or TERMSEL2[1] or TERMSEL3[1] to 0 in
COMPMODE register (See Energy-to-Frequency Conversion
for more details).
Line Cycle Apparent Energy Accumulation Mode
As described in the Line Cycle Active Energy Accumulation
Mode section, in line cycle energy accumulation mode, the
energy accumulation can be synchronized to the voltage channel
zero crossings allowing apparent energy to be accumulated over an
integral number of half line cycles. In this mode, the ADE7880
transfers the apparent energy accumulated in the 32-bit internal
accumulation registers into the xVAHR registers after an
integral number of line cycles, as shown in Figure 55. The
number of half line cycles is specified in the LINECYC register
The line cycle apparent energy accumulation mode is activated
by setting Bit 2 (LVA) in the LCYCMODE register. The apparent
energy accumulated over an integer number of zero crossings is
written to the xVAHR accumulation registers after the number
of zero crossings specified in LINECYC register is detected. When
using the line cycle accumulation mode, set Bit 6 (RSTREAD) of
the LCYCMODE register to Logic 0 because a read with the reset of
xVAHR registers is not available in this mode.
Phase A, Phase B, and Phase C zero crossings are, respectively,
included when counting the number of half line cycles by setting
Bits[5:3] (ZXSEL[x]) in the LCYCMODE register. Any
combina-tion of the zero crossings from all three phases can be
used for counting the zero crossing. Select only one phase at a
time for inclusion in the zero-crossings count during calibration.
AVRMS
AIRMS
ZERO CROSSING
ZERO CROSSING
ZERO CROSSING
Figure 55. Line Cycle Apparent Energy Accumulation Mode
DETECTION
DETECTION
DETECTION
(PHASE A)
(PHASE B)
(PHASE C)
LCYCMODE[7:0]
LCYCMODE[7:0]
LCYCMODE[7:0]
AVAGAIN
ZXSEL[0] in
ZXSEL[1] in
ZXSEL[2] in
Σ
Σ
34
VATHR
THRESHOLD
27
Accumulator
Internal
26
0
0
Σ
LINECYC[15:0]
CALIBRATION
CONTROL
32 bit register
AVAHR[31:0]
Rev. PrE | Page 52 of 103
For details on setting the LINECYC register and Bit 5 (LENERGY)
in the MASK0 interrupt mask register associated with the line
cycle accumulation mode, see the Line Cycle Active Energy
Accumulation Mode section.
POWER FACTOR CALCULATION
The ADE7880 provides a direct power factor measurement
simultaneously on all phases. Power factor in an AC circuit is
defined as the ratio of the total active power flowing to the load
to the apparent power. The absolute power factor measurement
is defined in terms of “leading” or “lagging” referring to
whether the current is leading or lagging the voltage waveform.
When the current is leading the voltage, the load is capacitive
and this is defined as a negative power factor. When the
current is lagging the voltage, the load is inductive and this
defined as a positive power factor. The relationship of the
current to the voltage waveform is illustrated in Figure 56.
As shown in Figure 56, the reactive power measurement is
negative when the load is capacitive, and positive when the load
is inductive. The sign of the reactive power can therefore be
used to reflect the sign of the power factor. Note that the
ADE7880 computes the fundamental reactive power, so its sign
is used as the sign of the absolute power factor. If the
fundamental reactive power is in no load state, then the sign of
the power factor is the sign of the total active power.
The mathematical definition of power factor is shown in
Equation 46:
As previously mentioned, the ADE7880 provides a power factor
measurement on all phases simultaneously. These readings are
provided into three 16 bit signed registers, APF (Address
0xE609 ) for phase A, BPF (Address 0xE60A) for phase B, and
CPF (Address 0xE60B) for phase C. The registers are signed 2’s
Power
ACTIVE(-)
REACTIVE(-)
PF(+)
ACTIVE(-)
REACTIVE(+)
PF(-)
Factor
=
(sign
Figure 56: Capacitive and Inductive Loads
Fundamenta
Preliminary Technical Data
l
Reactive
θ
θ
I
I
=
=
−
+
60
60
REACTIVE(+)
REACTIVE(-)

Power)

ACTIVE(+)
ACTIVE(+)
PF=+0.5
PF=-0.5
PF(+)
PF(-)
×
Total
Apparent
CAPACITIVE:
CURRENT LEADS
VOLTAGE
INDUCTIVE:
CURRENT LAGS
VOLTAGE
V
Active
Power
Power
(46)