UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 243

• Manufacturer Part Number: UPD78F0500AMC-CAB-AX
• Description: MCU 8BIT 30SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500AMC-CAB-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
6.4.3 When subsystem clock is not used
clock as an I/O port, set the XT1 and XT2 pins to I/O mode (OSCSELS = 0) and connect them as follows.
6.4.4 Internal high-speed oscillator
internal oscillation mode register (RCM).
6.4.5 Internal low-speed oscillator
low-speed oscillation clock cannot be used as the CPU clock.
software” is set, oscillation can be controlled by the internal oscillation mode register (RCM).
(240 kHz (TYP.)) if the watchdog timer operation is enabled using the option byte.
6.4.6 Prescaler
the clock to be supplied to the CPU.
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
If it is not necessary to use the subsystem clock
Note
Input (PM123/PM124 = 1):
Output (PM123/PM124 = 0): Leave open.
Remark OSCSELS:
The internal high-speed oscillator is incorporated in the 78K0/Kx2 microcontrollers. Oscillation can be controlled by the
After a reset release, the internal high-speed oscillator automatically starts oscillation (8 MHz (TYP.)).
The internal low-speed oscillator is incorporated in the 78K0/Kx2 microcontrollers.
The internal low-speed oscillation clock is only used as the watchdog timer and the clock of 8-bit timer H1. The internal
“Can be stopped by software” or “Cannot be stopped” can be selected by the option byte. When “Can be stopped by
After a reset release, the internal low-speed oscillator automatically starts oscillation, and the watchdog timer is driven
The prescaler generates the CPU clock by dividing the main system clock when the main system clock is selected as
The 78K0/KB2 is not provided with a subsystem clock.
PM123, PM124: Bits 3 and 4 of port mode register 12 (PM12)
Bit 4 of clock operation mode select register (OSCCTL)
Independently connect to V
Note
for low power consumption operations, or if not using the subsystem
DD
or V
SS
via a resistor.
CHAPTER 6 CLOCK GENERATOR
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