UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 278

• Manufacturer Part Number: UPD78F0500AMC-CAB-AX
• Description: MCU 8BIT 30SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500AMC-CAB-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Address: FFBAH
Note The TI000 pin valid edge is set by bits 5 and 4 (ES001, ES000) of prescaler mode register 00 (PRM00).
Symbol
TMC00
OVF00 is set to 1 when the value of TM00 changes from FFFFH to 0000H in all the operation modes (free-running
timer mode, clear & start mode entered by TI000 pin valid edge input, and clear & start mode entered upon a match
between TM00 and CR000).
It can also be set to 1 by writing 1 to OVF00.
Clear (0)
TMC003
TMC001
OVF00
Set (1)
0
0
1
1
0
1
7
0
After reset: 00H
Figure 7-6. Format of 16-Bit Timer Mode Control Register 00 (TMC00)
• Match between TM00 and CR000 or match between TM00 and CR010
• Match between TM00 and CR000 or match between TM00 and CR010
• Trigger input of TI000 pin valid edge
Clears OVF00 to 0 or TMC003 and TMC002 = 00
Overflow occurs.
TMC002
0
1
0
1
6
0
R/W
Disables 16-bit timer/event counter 00 operation. Stops supplying operating clock.
Clears 16-bit timer counter 00 (TM00).
Free-running timer mode
Clear & start mode entered by TI000 pin valid edge input
Clear & start mode entered upon a match between TM00 and CR000
5
0
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Condition to reverse timer output (TO00)
Operation enable of 16-bit timer/event counter 00
4
0
TM00 overflow flag
TMC003
3
TMC002
2
Note
TMC001
1
OVF00
<0>
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