UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 325

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UPD78F0500AMC-CAB-AX

Manufacturer Part Number
UPD78F0500AMC-CAB-AX
Description
MCU 8BIT 30SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet

Specifications of UPD78F0500AMC-CAB-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0/Kx2
7.4.7 One-shot pulse output operation
0n (TMC0n) to 01 (free-running timer mode) or to 10 (clear & start mode entered by the TI00n pin valid edge) and setting
bit 5 (OSPE0n) of 16-bit timer output control register 0n (TOC0n) to 1.
clearing & starting of TM0n is triggered, and a pulse of the difference between the values of CR00n and CR01n is output
only once from the TO0n pin.
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
A one-shot pulse can be output by setting bits 3 and 2 (TMC0n3 and TMC0n2) of the 16-bit timer mode control register
When bit 6 (OSPT0n) of TOC0n is set to 1 or when the valid edge is input to the TI00n pin during timer operation,
Cautions 1. Do not input the trigger again (setting OSPT0n to 1 or detecting the valid edge of the TI00n pin)
Remarks 1. For the setting of the I/O pins, see 7.3 (5) Port mode register 0 (PM0).
Remark n = 0:
TI00n edge detection
2. For how to enable the INTTM00n signal interrupt, see CHAPTER 20 INTERRUPT FUNCTIONS.
2. To use only the setting of OSPT0n to 1 as the trigger of one-shot pulse output, do not change the
OSPE0n bit
n = 0, 1: 78K0/KE2 products whose flash memory is at least 48 KB, and 78K0/KF2 products
OSPT0n bit
while the one-shot pulse is output. To output the one-shot pulse again, generate the trigger after
the current one-shot pulse output has completed.
level of the TI00n pin or its alternate function port pin. Otherwise, the pulse will be unexpectedly
output.
Count clock
78K0/KE2 products whose flash memory is less than 32 KB, and 78K0/KB2, 78K0/KC2,
78K0/KD2 products
TMC0n3, TMC0n2
Figure 7-48. Block Diagram of One-Shot Pulse Output Operation
Operable bits
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Compare register
Timer counter
Clear
Match signal
(CR01n)
(TM0n)
Compare register
(CR00n)
Match signal
controller
Output
TO0n output
Interrupt signal
(INTTM00n)
Interrupt signal
(INTTM01n)
TO0n pin
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