UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 245

• Manufacturer Part Number: UPD78F0500AMC-CAB-AX
• Description: MCU 8BIT 30SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500AMC-CAB-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Subsystem clock (f
<1> When the power is turned on, an internal reset signal is generated by the power-on-clear (POC) circuit.
Notes 1.
(when XT1 oscillation
<2> When the power supply voltage exceeds 1.59 V (TYP.), the reset is released and the internal high-speed
<3> When the power supply voltage rises with a slope of 0.5 V/ms (MIN.), the CPU starts operation on the internal
<4> Set the start of oscillation of the X1 or XT1 clock via software (see (1) in 6.6.1 Example of controlling high-
<5> When switching the CPU clock to the X1 or XT1 clock, wait for the clock oscillation to stabilize, and then set
oscillation clock (f
(when X1 oscillation
Internal high-speed
Internal reset signal
system clock (f
Power supply
voltage (V
selected)
oscillator automatically starts oscillation.
high-speed oscillation clock after the reset is released and after the stabilization times for the voltage of the
power supply and regulator have elapsed, and then reset processing is performed.
speed system clock and (1) in 6.6.3 Example of controlling subsystem clock).
switching via software (see (3) in 6.6.1 Example of controlling high-speed system clock and (3) in 6.6.3
Example of controlling subsystem clock).
High-speed
2.
3.
CPU clock
selected)
With standard and (A) grade products, if the voltage rises with a slope of less than 0.5 V/ms (MIN.) from
power application until the voltage reaches 1.8 V, input a low level to the RESET pin from power
application until the voltage reaches 1.8 V, or set the 2.7 V/1.59 V POC mode by using the option byte
(POCMODE = 1) (see Figure 6-16). When a low level has been input to the RESET pin until the voltage
reaches 1.8 V, the CPU operates with the same timing as <2> and thereafter in Figure 6-15, after the reset
has been released by the RESET pin.
With (A2) grade products, if the voltage rises with a slope of less than 0.75 V/ms (MIN.) from power
application until the voltage reaches 2.7 V, input a low level to the RESET pin from power application until
the voltage reaches 2.7 V. When a low level has been input to the RESET pin until the voltage reaches 2.7
V, the CPU operates with the same timing as <2> and thereafter in Figure 6-15, after the reset has been
released by the RESET pin.
The internal voltage stabilization time includes the oscillation accuracy stabilization time of the internal
high-speed oscillation clock.
Note 5
DD
SUB
0 V
RH
XH
Figure 6-15. Clock Generator Operation When Power Supply Voltage Is Turned On
)
)
)
)
<1>
1.59 V
(TYP.)
(When 1.59 V POC Mode Is Set (Option Byte: POCMODE = 0))
1.8 V
<3> Waiting for
voltage stabilization
<2>
(MIN.)
(1.93 to 5.39 ms)
0.5 V/ms
Note 3
Notes 1,2
Notes 1,2
Starting X1 oscillation
is set by software.
Starting XT1 oscillation
is set by software.
Internal high-speed oscillation clock
Reset processing
<4>
(11 to 45 s)
oscillation stabilization time:
<4>
2
11
/f
X
X1 clock
to 2
16
/f
X
Note 4
<5>
CHAPTER 6 CLOCK GENERATOR
High-speed system clock
Switched by
software
<5>
Subsystem clock
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