UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 267

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UPD78F0500AMC-CAB-AX

Manufacturer Part Number
UPD78F0500AMC-CAB-AX
Description
MCU 8BIT 30SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet

Specifications of UPD78F0500AMC-CAB-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0/Kx2
internal high-speed oscillation clock and the high-speed system clock).
switchover clock for several clocks (see Table 6-10).
ascertained using bit 1 (MCS) of MCM.
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Remark 2. When switching the CPU clock from the main system clock to the subsystem clock, calculate the number
By setting bit 0 (MCM0) of the main clock mode register (MCM), the main system clock can be switched (between the
The actual switchover operation is not performed immediately after rewriting to MCM0; operation continues on the pre-
Whether the CPU is operating on the internal high-speed oscillation clock or the high-speed system clock can be
Cautions 1.
Remarks 1. The number of clocks listed in Table 6-10 is the number of main system clocks before switchover.
2.
2. Calculate the number of clocks in Table 6-10 by removing the decimal portion.
Set Value Before Switchover
of clocks by rounding up to the next clock and discarding the decimal portion, as shown below.
Example When switching CPU clock from f
Example When switching the main system clock from the internal high-speed oscillation clock to the
When switching the internal high-speed oscillation clock to the high-speed system clock, bit 2
(XSEL) of MCM must be set to 1 in advance. The value of XSEL can be changed only once after a
reset release.
Do not rewrite MCM0 when the CPU clock operates with the subsystem clock.
Table 6-10. Maximum Time Required for Main System Clock Switchover
MCM0
kHz)
0
1
high-speed system clock (@ oscillation with f
f
1 + 2f
XP
/f
SUB
RH
/f
= 10000/32.768 ≅ 305.1 → 306 clocks
XH
= 1 + 2 × 8/10 = 1 + 2 × 0.8 = 1 + 1.6 = 2.6 → 2 clocks
1 + 2f
XH
/f
RH
clock
0
XP
Set Value After Switchover
/2 to f
SUB
MCM0
RH
/2 (@ oscillation with f
= 8 MHz, f
1 + 2f
CHAPTER 6 CLOCK GENERATOR
RH
/f
XH
XH
clock
= 10 MHz)
1
XP
= 10 MHz, f
SUB
= 32.768
267

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