UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 324

• Manufacturer Part Number: UPD78F0500AMC-CAB-AX
• Description: MCU 8BIT 30SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500AMC-CAB-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Note Care must be exercised when setting TOC0n. For details, see 7.3 (3) 16-bit timer output control register
Remarks 1. PPG pulse cycle = (M + 1) × Count clock cycle
<1> Count operation start flow
(TOE0n, TOC0n4, TOC0n1)
Compare match interrupt
Compare match interrupt
Timer output control bits
TMC0n3, TMC0n2 bits = 11
CR00n, CR01n registers,
0n (TOC0n).
(TMC0n3, TMC0n2)
Register initial setting
TOC0n register
2. n = 0:
Compare register
Compare register
PRM0n register,
CRC0n register,
port setting
PPG duty = (N + 1)/(M + 1)
n = 0, 1: 78K0/KE2 products whose flash memory is at least 48 KB, and 78K0/KF2 products
TM0n register
Operable bits
START
TO0n output
(INTTM00n)
(INTTM01n)
Figure 7-47. Example of Software Processing for PPG Output Operation
(CR00n)
(CR01n)
0000H
78K0/KE2 products whose flash memory is less than 32 KB, and 78K0/KB2, 78K0/KC2,
78K0/KD2 products
Note
,
00
<1>
Initial setting of these
registers is performed
before setting the
TMC0n3 and TMC0n2
bits.
Starts count operation
N + 1
M + 1
N
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
M
<2> Count operation stop flow
N + 1
11
TMC0n3, TMC0n2 bits = 00
M
N
M + 1
N
STOP
M
N + 1
M + 1
N
The counter is initialized
and counting is stopped
by clearing the TMC0n3
and TMC0n2 bits to 00.
M
<2>
00
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