LE3100MICH S L8YC Intel, LE3100MICH S L8YC Datasheet - Page 10

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LE3100MICH S L8YC

Manufacturer Part Number
LE3100MICH S L8YC
Description
Manufacturer
Intel
Datasheet

Specifications of LE3100MICH S L8YC

Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
1.1.1
10
Processor Terminology Definitions
Commonly used terms are explained here for clarification:
• Dual-Core Intel® Xeon® Processor 3100 Series — Dual core processor in the
• Processor — For this document, the term processor is the generic form of the
• Intel
• Keep-out zone — The area on or near the processor that system design can not
• Processor core — Processor die with integrated L2 cache.
• LGA775 socket — The Dual-Core Intel® Xeon® Processor 3100 Series mate with
• Integrated heat spreader (IHS) —A component of the processor package used
• Retention mechanism (RM) — Since the LGA775 socket does not include any
• FSB (Front Side Bus) — The electrical interface that connects the processor to
• Storage conditions — Refers to a non-operational state. The processor may be
• Functional operation — Refers to normal operating conditions in which all
• Execute Disable Bit — Execute Disable Bit allows memory to be marked as
• Intel
FC-LGA8 package with a 6 MB L2 cache.
Dual-Core Intel® Xeon® Processor 3100 Series.
based desktop, mobile and mainstream server multi-core processors. For additional
information refer to:
utilize.
the system board through a surface mount, 775-land, LGA socket.
to enhance the thermal performance of the package. Component thermal solutions
interface with the processor at the IHS surface.
mechanical features for heatsink attach, a retention mechanism is required.
Component thermal solutions should attach to the processor via a retention
mechanism that is independent of the socket.
the chipset. Also referred to as the processor system bus or the system bus. All
memory and I/O transactions as well as interrupt messages pass between the
processor and chipset over the FSB.
installed in a platform, in a tray, or loose. Processors may be sealed in packaging or
exposed to free air. Under these conditions, processor lands should not be
connected to any supply voltages, have any I/Os biased, or receive any clocks.
Upon exposure to “free air”(i.e., unsealed packaging or a device removed from
packaging material) the processor must be handled in accordance with moisture
sensitivity labeling (MSL) as indicated on the packaging material.
processor specifications, including DC, AC, system bus, signal quality, mechanical
and thermal are satisfied.
executable or non-executable, when combined with a supporting operating system.
If code attempts to run in non-executable memory the processor raises an error to
the operating system. This feature can prevent some classes of viruses or worms
that exploit buffer over run vulnerabilities and can thus help improve the overall
security of the system. See the Intel
for more detailed information.
the processor to execute operating systems and applications written to take
advantage of the Intel 64 architecture. Further details on Intel 64 architecture and
programming model can be found in the Intel Extended Memory 64 Technology
Software Developer Guide at http://developer.intel.com/technology/
64bitextensions/.
®
®
Core
64 Architecture— An enhancement to Intel's IA-32 architecture, allowing
TM
microarchitecture — A new foundation for Intel
http://www.intel.com/technology/architecture/coremicro/
®
Architecture Software Developer's Manual
®
architecture-
Introduction
Datasheet

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