LE3100MICH S L8YC Intel, LE3100MICH S L8YC Datasheet - Page 13

• Manufacturer Part Number: LE3100MICH S L8YC
• Manufacturer: Intel

Specifications of LE3100MICH S L8YC

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Electrical Specifications
2
2.1
2.2
2.2.1
2.2.2
Datasheet
Electrical Specifications
Power and Ground Lands
The processor has VCC (power), VTT, and VSS (ground) inputs for on-chip power
distribution. All power lands must be connected to V
connected to a system ground plane. The processor VCC lands must be supplied the
voltage determined by the Voltage IDentification (VID) lands.
The signals denoted as VTT provide termination for the front side bus and power to the
I/O buffers. A separate supply must be implemented for these lands, that meets the
V
Decoupling Guidelines
Due to its large number of transistors and high internal clock speeds, the processor is
capable of generating large current swings. This may cause voltages on power planes
to sag below their minimum specified values if bulk decoupling is not adequate. Larger
bulk storage (C
current during longer lasting changes in current demand by the component, such as
coming out of an idle condition. Similarly, they act as a storage well for current when
entering an idle condition from a running condition. The motherboard must be designed
to ensure that the voltage provided to the processor remains within the specifications
listed in
the component. For further information and guidelines, refer to the appropriate
platform design guidelines.
V
V
processor voltage specifications. This includes bulk capacitance with low effective series
resistance (ESR) to keep the voltage rail within specifications during large swings in
load current. In addition, ceramic decoupling capacitors are required to filter high
frequency content generated by the front side bus and processor activity. Consult the
Voltage Regulator-Down (VRD) 11.0 Processor Power Delivery Design Guidelines For
Desktop LGA775 Socket and appropriate platform design guidelines for further
information.
V
Decoupling must be provided on the motherboard. Decoupling solutions must be sized
to meet the expected load. To ensure compliance with the specifications, various
factors associated with the power delivery solution must be considered including
regulator type, power plane and trace sizing, and component placement. A
conservative decoupling solution would consist of a combination of low ESR bulk
capacitors and high frequency ceramic capacitors. For further information regarding
power delivery, decoupling and layout guidelines, refer to the appropriate platform
design guidelines.
TT
CC
CC
TT
specifications outlined in
regulator solutions need to provide sufficient decoupling capacitance to satisfy the
Decoupling
Decoupling
Table
2-3. Failure to do so can result in timing violations or reduced lifetime of
BULK
), such as electrolytic or aluminum-polymer capacitors, supply
Table
2-3.
CC
, while all VSS lands must be
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