LE3100MICH S L8YC Intel, LE3100MICH S L8YC Datasheet - Page 24

• Manufacturer Part Number: LE3100MICH S L8YC
• Manufacturer: Intel

Specifications of LE3100MICH S L8YC

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Table 2-9.
Table 2-10. Open Drain and TAP Output Signal Group DC Specifications
Table 2-11. CMOS Signal Group DC Specifications
2.7.3.1
24
GTL+ Signal Group DC Specifications
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
Notes:
1.
2.
3.
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
Platform Environment Control Interface (PECI) DC Specifications
PECI is an Intel proprietary one-wire interface that provides a communication channel
between Intel processors, chipsets, and external thermal monitoring devices. The
processor contains Digital Thermal Sensors (DTS) distributed throughout die. These
sensors are implemented as analog-to-digital converters calibrated at the factory for
reasonable accuracy to provide a digital representation of relative processor
temperature. PECI provides an interface to relay the highest DTS temperature within a
Symbol
Symbol
V
V
V
I
I
V
I
I
I
R
V
I
I
I
LO
OH
LO
OL
OH
OL
OL
OL
LI
LO
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
V
V
V
Refer to processor I/O Buffer Models for I/V characteristics.
The V
Leakage to V
Leakage to V
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
Measured at V
For Vin between 0 and V
IH
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
All outputs are open drain.
V
V
V
The V
I
Leakage to V
Leakage to V
ON
IL
LI
OL
IL
IH
IH
IL
IH
IH
is measured at 0.10 * V
is defined as the voltage range at a receiving agent that will be interpreted as a logical low value.
is defined as the voltage range at a receiving agent that will be interpreted as a logical low value.
is defined as the voltage range at a receiving agent that will be interpreted as a logical high value.
and V
is defined as the voltage range at a receiving agent that will be interpreted as a logical high value.
and V
TT
TT
Output Low Voltage
Output Low Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Output Low Current
Output Low Current
Input Leakage Current
Output Leakage Current
Input Leakage Current
Output Leakage Current
Buffer On Resistance
referred to in these specifications is the instantaneous V
referred to in these specifications refers to instantaneous V
OH
OH
may experience excursions above V
may experience excursions above V
SS
TT
SS
TT
TT
with land held at 300mV.
with land held at 300 mV.
with land held at V
with land held at V
* 0.2V.
Parameter
OH
Parameter
.
TT.
I
OH
is measured at 0.90 * V
TT
TT
.
.
7.49
N/A
N/A
TT
TT
..
..
V
V
TT
TT
V
0.90 * V
TT
* 0.10 / 67
* 0.10 / 67
-0.10
-0.10
Min
N/A
N/A
* 0.70
TT.
TT
TT
Min
N/A
16
0
.
± 100
± 100
TT
9.16
.
V
V
TT
TT
V
V
V
V
TT
TT
TT
TT
* 0.10 / 27
* 0.10 / 27
± 100
± 100
Max
± 200
+ 0.10
+ 0.10
* 0.30
* 0.10
Max
0.20
50
Electrical Specifications
Uni
mA
µA
V
t
Uni
µA
µA
W
µA
µA
V
V
V
V
A
A
t
Notes
Datasheet
Notes
4, 5, 6
2, 5, 6
2
3
-
3, 6
6, 7
6, 7
7
8
5
6
8
9
1
1