DS31256 Maxim Integrated Products, DS31256 Datasheet - Page 176

IC CTRLR HDLC 256-CHANNEL 256BGA

DS31256

Manufacturer Part Number
DS31256
Description
IC CTRLR HDLC 256-CHANNEL 256BGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS31256

Controller Type
HDLC Controller
Interface
Serial
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
500mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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14.
REVISION
112102
073103
101104
031405
012506
REVISION HISTORY
Corrected various typographical errors, including:
Page 109: Removed “Chateau” from Figure 9-11.
Page 137, Bits 16 to 31/Device ID. These read-only bits identify the DS31256 as the device
being used. The device ID was assigned by Dallas Semiconductor and is fixed at 31256h. The
device ID is 3134, not 31256.
Page 142, Bits 16 to 31/Device ID. These read-only bits identify the DS31256 as the device
being used. The device ID was assigned by Dallas Semiconductor and is fixed at 31256h. The
device ID is 3134, not 31256.
Page 151: Section 11.1.2 Configuration Mode. Added info about how data cannot be passed
from the local bus to the PCI bus in this mode—The DS31256 PCI configuration registers
cannot be accessed via the PCI bus when the DS31256 is in Configuration mode (LMS=1). In
this mode no device registers are accessible via the PCI bus.
Page 83: Added the last paragraph that states the DS31256 has no restrictions on the transmit
side, but lists the restrictions on the location and size of the receive buffers in host memory.
Page 90: Removed “Chateau” from Figure 9-2.
Added lead-free package information to Ordering Information table (page 1).
Section 3.3: Local Bus Signal Description:
New product release.
Lifted some usage restrictions
Changed maximum number of T1 links from 64 to 60
Added U12 as a Ground in Table 3-A.
Removed PCI t5 and VIH exceptions to PCI 2.1 compliance.
Changed 8191 to 8188 in Figure 9-1 to be dword consistent.
Changed Logic 1 minimum from 2.2V to 1.8V in Section 13.
Added typical supply current and increase the maximum in Section 13.
Added typical supply current and increase the maximum in Section 13.
Removed t5 compliance issue and added Note 16 in Section 13, PCI.
Added Chapter 15, Thermal Properties.
Updated recommended components in Section 17:Applications.
Removed sentence “These signals are sampled on the rising edge of LCLK to
determine the internal device configuration register that the external host wishes to
access.” from LA0 to LA19 description.
Removed sentence “In configuration mode (LMS = 1), this signal is sampled on the
rising edge of LCLK.” from LWR(LR/W) description.
Removed sentence “In configuration mode (LMS = 1), this signal is sampled on the
rising edge of LCLK.” from LRD(LDS) description.
176 of 183
DESCRIPTION

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