DS31256 Maxim Integrated Products, DS31256 Datasheet - Page 64

IC CTRLR HDLC 256-CHANNEL 256BGA

DS31256

Manufacturer Part Number
DS31256
Description
IC CTRLR HDLC 256-CHANNEL 256BGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS31256

Controller Type
HDLC Controller
Interface
Serial
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
500mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Bit #
Name
Default
Bit #
Name
Default
Bit #
Name
Default
Bit #
Name
Default
Bits 8 to 15/Alternating Word Count Rate. When the BERT is programmed in the alternating word mode, the
words repeat for the count loaded into this register, then flip to the other word and again repeat for the number of
times loaded into this register. The valid count range is from 05h to FFh.
Register Name:
Register Description:
Register Address:
Register Name:
Register Description:
Register Address:
BERTRP0: BERT Repetitive Pattern Set 0 (lower word)
BERTRP1: BERT Repetitive Pattern Set 1 (upper word)
Note: Bits that are underlined are read-only; all other bits are read-write.
Bits 0 to 31/BERT Repetitive Pattern Set (BERTRP0 and BERTRP1). These registers must be properly loaded
for the BERT to properly generate and synchronize to either a repetitive pattern, a pseudorandom pattern, or an
alternating word pattern. For a repetitive pattern that is less than 32 bits, the pattern should be repeated so that all
32 bits are used to describe the pattern. For example, if the pattern was the repeating 5-bit pattern …01101…
(where the right-most bit is sent first and received first), then PBRP0 should be loaded with xB5AD and PBRP1
should be loaded with x5AD6. For a pseudorandom pattern, both registers should be loaded with all ones (i.e.,
xFFFF). For an alternating word pattern, one word should be placed into PBRP0 and the other word should be
placed into PBRP1. For example, if the DDS stress pattern “7E” is to be described, the user would place x0000 in
PBRP0 and x7E7E in PBRP1 and the alternating word counter would be set to 50 (decimal) to allow 100 Bytes of
00h followed by 100 Bytes of 7Eh to be sent and received.
EIB2
0
0
0
0
1
1
1
1
EIB1
23
31
0
0
0
0
1
1
0
0
1
1
15
7
0
0
EIB0
BERTBRP0
BERT Repetitive Pattern Set 0
0508h
BERTBRP1
BERT Repetitive Pattern Set 1
050Ch
22
30
0
1
0
1
0
1
0
1
0
0
14
6
0
0
No errors automatically inserted
10E-1
10E-2
10E-3
10E-4
10E-5
10E-6
10E-7
29
21
0
0
BERT Repetitive Pattern Set (upper byte)
BERT Repetitive Pattern Set (lower byte)
13
5
0
0
Error Rate Inserted
BERT Repetitive Pattern Set
BERT Repetitive Pattern Set
20
28
0
0
12
64 of 183
4
0
0
11
19
27
3
0
0
0
0
10
18
26
0
2
0
0
0
17
25
1
0
9
0
0
0
16
24
0
0
0
0
8
0

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