DS31256 Maxim Integrated Products, DS31256 Datasheet - Page 65

IC CTRLR HDLC 256-CHANNEL 256BGA

DS31256

Manufacturer Part Number
DS31256
Description
IC CTRLR HDLC 256-CHANNEL 256BGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS31256

Controller Type
HDLC Controller
Interface
Serial
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
500mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Bit #
Name
Default
Bit #
Name
Default
Bit #
Name
Default
Bit #
Name
Default
Register Name:
Register Description:
Register Address:
Register Name:
Register Description:
Register Address:
BERTBC0: BERT Bit Counter 0 (lower word)
BERTBC1: BERT Bit Counter 0 (upper word)
Note: Bits that are underlined are read-only; all other bits are read-write
Bits 0 to 31/BERT 32-Bit Bit Counter (BERTBC0 and BERTBC1). This 32-bit counter increments for each
data bit (i.e., clock) received. This counter is not disabled when the receive BERT loses synchronization. This
counter is loaded with the current bit count value when the LC control bit in the BERTC0 register is toggled from
low (0) to high (1). When full, this counter saturates and sets the BBCO status bit.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Note: Bits that are underlined are read-only; all other bits are read-write.
Bit 0/Real-Time Synchronization Status (SYNC). Real-time status of the synchronizer (this bit is not latched). Is
set when the incoming pattern matches for 32 consecutive bit positions. Is cleared when six or more bits out of 64
are received in error.
15
23
31
n/a
7
0
0
0
0
15
7
0
0
BERTBC0
BERT 32-Bit Bit Counter (lower word)
0510h
BERTBC1
BERT 32-Bit Bit Counter (upper word)
0514h
BERTEC0
BERT 24-Bit Error Counter (lower) and Status Information
0518h
14
22
30
RA1
6
0
0
0
0
14
6
0
0
13
21
29
RA0
5
0
0
0
0
BERT 24-Bit Error Counter (lower byte)
13
BERT 32-Bit Bit Counter (lower byte)
BERT 32-Bit Bit Counter (upper byte)
5
0
0
BERT 32-Bit Bit Counter
BERT 32-Bit Bit Counter
RLOS
12
20
28
65 of 183
4
0
0
0
0
12
4
0
0
.
BED
11
19
27
3
0
0
0
0
11
3
0
0
BBCO
10
18
26
0
0
2
0
0
10
2
0
0
BECO
17
25
1
0
9
0
0
0
1
0
9
0
SYNC
16
24
0
0
8
0
0
0
0
0
8
0

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