DS31256 Maxim Integrated Products, DS31256 Datasheet - Page 57

• Manufacturer Part Number: DS31256
• Description: IC CTRLR HDLC 256-CHANNEL 256BGA
• Manufacturer: Maxim Integrated Products

Specifications of DS31256

• Controller Type: HDLC Controller
• Interface: Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 500mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 6-B. Receive V.54 Search Routine
STEP
1
2
3
4
Set up the channel search
Toggle VRST
Wait for SLBP
Read VTO and VLB
DIRECTION
By configuring the RV54 bit in the R[n]CFG[j] register, the host
determines in which DS0 channels the V.54 search is to take place. If
this search sequence does not detect the V.54 pattern, the host can pick
some new DS0 channels and try again.
Once the DS0 channels have been set, the host toggles the VRST bit in
the RP[n]CR register and begins monitoring the SLBP status bit.
The SLBP status bit reports any change of state in the V.54 search
process. It can also generate a hardware interrupt (Section 5). When
SLBP is set, the host knows that something significant has occurred and
that it should read the VLB and VTO real-time status bits in the
RP[n]CR register.
If VTO = 1, the V.54 pattern did not appear in this set of channels and
the host can reconfigure the search in other DS0 channels and move
back to Step #1.
If VLB = 1, the V.54 loop-up pattern has been detected and the channel
should be placed into loopback. A loopback can be invoked by the host
by configuring the CNLB bit in the T[n]CFG[j] register for each DS0
channel that needs to be placed into loopback. Move back to Step #3.
If VLB = 0, if the DS0 channels are already in loopback, the host
monitors VLB to know when the loop-down pattern has been detected
and when to take the channels out of loopback. The DS0 channels are
taken out of loopback by again configuring the CNLB bits. Move on to
Step #1.
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FUNCTION