AT32AP7002-CTUT Atmel, AT32AP7002-CTUT Datasheet - Page 315

• Manufacturer Part Number: AT32AP7002-CTUT
• Description: IC MCU 32BIT AVR32 196-CBGA
• Manufacturer: Atmel
• Series: AVR®32 AP7r

Specifications of AT32AP7002-CTUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²C, LCD, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: D/A 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-CBGA
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, JTAG, PS2, SPI, SSC, UART, USART, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 16 bit, 2 Channel
• Package: 196CTBGA
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 150 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

21.4.1
21.5
21.5.1
21.5.2
21.5.3
32054F–AVR32–09/09
Product Dependencies
I/O Lines Description
I/O Lines
Power Management
Interrupt
Table 21-1.
Both TWD and TWCK are bi-directional lines, connected to a positive supply voltage via a cur-
rent source or pull-up resistor (see
are high. The output stages of devices connected to the bus must have an open-drain or open-
collector to perform the wired-AND function.
TWD and TWCK pins may be multiplexed with PIO lines. To enable the TWI, the programmer
must program the PIO controller to dedicate TWD and TWCK as peripheral lines.
The TWI clock is generated by the power manager. Before using the TWI, the programmer must
ensure that the TWI clock is enabled in the power manager.
In the TWI description, Master Clock (MCK) is the clock of the peripheral bus to which the TWI is
connected.
The TWI interface has an interrupt line connected to the interrupt controller. In order to handle
interrupts, the interrupt controller must be programmed before configuring the TWI.
Pin Name
TWD
TWCK
I/O Lines Description
Pin Description
Two-wire Serial Data
Two-wire Serial Clock
Figure 21-2 on page
314). When the bus is free, both lines
AT32AP7002
Input/Output
Input/Output
Type
315