AT32AP7002-CTUT Atmel, AT32AP7002-CTUT Datasheet - Page 447

• Manufacturer Part Number: AT32AP7002-CTUT
• Description: IC MCU 32BIT AVR32 196-CBGA
• Manufacturer: Atmel
• Series: AVR®32 AP7r

Specifications of AT32AP7002-CTUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²C, LCD, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: D/A 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-CBGA
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, JTAG, PS2, SPI, SSC, UART, USART, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 16 bit, 2 Channel
• Package: 196CTBGA
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 150 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

Figure 25-5. Audio Transfer (PCM L Front, PCM R Front) on Channel x
25.7.3.3
32054F–AVR32–09/09
(Controller Output)
Write access to
AC97C_THRx
(AC97C_SR)
(AC97C_SR)
TXEMPTY
TXRDYCx
AC97FS
AC97TX
Slot #
AC97 Output Frame
TAG
0
transfered to the shift register
The TXEMPTY flag in the AC97 Controller Channel x Status Register (CxSR) is set when all
requested transmissions for a channel have been shifted on the AC-link. The application can
either poll TXEMPTY flag in CxSR or wait for an interrupt notice associated with the same flag.
In most cases, the AC97 Controller is embedded in chips that target audio player devices. In
such cases, the AC97 Controller is exposed to heavy audio transfers. Using the polling tech-
nique increases processor overhead and may fail to keep the required pace under an operating
system.
In order to avoid these polling drawbacks, the application can perform audio streams by using a
DMA controller (DMAC) connected to both channels, which reduces processor overhead and
increases performance especially under an operating system.
The DMAC transmit counter values must be equal to the number of PCM samples to be trans-
mitted, each sample goes in one slot.
The AC97 Controller outputs a thirteen-slot frame on the AC-Link. The first slot (tag slot or slot 0)
flags the validity of the entire frame and the validity of each slot; whether a slot carries valid data
or not. Slots 1 and 2 are used if the application performs control and status monitoring actions
on AC97 Codec control/status registers. Slots [3:12] are used according to the content of the
AC97 Controller Output Channel Assignment Register (OCA). If the application performs many
transmit requests on a channel, some of the slots associated to this channel or all of them will
carry valid data.
ADDR
CMD
1
transfered to the shift register
PCM L Front
DATA
CMD
2
PCM R Front
L Front
3
PCM
R Front
4
PCM
LINE 1
DAC
5
Center
6
PCM
L SURR
PCM
7
R SURR
PCM
8
PCM
LFE
9
LINE 2
DAC
AT32AP7002
10
11
HSET
DAC
CTRL
12
IO
447