AT32AP7002-CTUT Atmel, AT32AP7002-CTUT Datasheet - Page 626

• Manufacturer Part Number: AT32AP7002-CTUT
• Description: IC MCU 32BIT AVR32 196-CBGA
• Manufacturer: Atmel
• Series: AVR®32 AP7r

Specifications of AT32AP7002-CTUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²C, LCD, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: D/A 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-CBGA
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, JTAG, PS2, SPI, SSC, UART, USART, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 16 bit, 2 Channel
• Package: 196CTBGA
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 150 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

31.7.1
Name:
Access Type:
• DEV_ADDR: USBA Address
Read:
This field contains the default address (0) after power-up or USBA bus reset.
Write:
This field is written with the value set by a SET_ADDRESS request received by the device firmware.
• FADDR_EN: Function Address Enable
Read:
0 = Device is not in address state.
1 = Device is in address state.
Write:
0 = only the default function address is used (0).
1 = this bit is set by the device firmware after a successful status phase of a SET_ADDRESS transaction. When set, the
only address accepted by the USBA controller is the one stored in the USBA Address field. It will not be cleared afterwards
by the device firmware. It is cleared by hardware on hardware reset, or when USBA bus reset is received (see above).
• EN_USBA: USBA Enable
Read:
0 = USBA is disabled.
1 = USBA is enabled.
Write:
0 = disable and reset the USBA controller, disable the USBA transceiver.
1 = enables the USBA controller.
32054F–AVR32–09/09
FADDR_EN
31
23
15
–
–
–
7
USBA Control Register
30
22
14
–
–
–
6
29
21
13
–
–
–
5
CTRL
Read/Write
28
20
12
–
–
–
4
DEV_ADDR
27
19
11
–
–
–
3
REWAKEUP
26
18
10
–
–
2
DETACH
AT32AP7002
25
17
–
–
9
1
EN_USBA
24
16
–
–
8
0
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