LPC2470FBD208,551 NXP Semiconductors, LPC2470FBD208,551 Datasheet - Page 333
![IC ARM7 MCU LCD 208-LQFP](/photos/12/13/121391/208-lqfp_sot459-1_pkg_sml.jpg)
LPC2470FBD208,551
Manufacturer Part Number
LPC2470FBD208,551
Description
IC ARM7 MCU LCD 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets
1.OM11077.pdf
(792 pages)
2.LPC2470FET208551.pdf
(89 pages)
3.LPC2470FET208551.pdf
(91 pages)
Specifications of LPC2470FBD208,551
Package / Case
208-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Type
ROMless
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2470U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208LQFP
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4361-5
935284068551
LPC2470FBD208-S
935284068551
LPC2470FBD208-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2470FBD208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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NXP Semiconductors
6. Operational overview
UM10237_4
User manual
5.5 DMA engine and bus master interface
5.6 Register interface
5.7 SoftConnect
5.8 GoodLink
When enabled for an endpoint, the DMA Engine transfers data between RAM on the AHB
bus and the endpoint’s buffer in EP_RAM. A single DMA channel is shared between all
endpoints. When transferring data, the DMA Engine functions as a master on the AHB
bus through the bus master interface.
The Register Interface allows the CPU to control the operation of the USB Device
Controller. It also provides a way to write transmit data to the controller and read receive
data from the controller.
The connection to the USB is accomplished by bringing D+ (for a full-speed device) HIGH
through a 1.5 kOhm pull-up resistor. The SoftConnect feature can be used to allow
software to finish its initialization sequence before deciding to establish connection to the
USB. Re-initialization of the USB bus connection can also be performed without having to
unplug the cable.
To use the SoftConnect feature, the CONNECT signal should control an external switch
that connects the 1.5 kOhm resistor between D+ and +3.3V. Software can then control the
CONNECT signal by writing to the CON bit using the SIE Set Device Status command.
Good USB connection indication is provided through GoodLink technology. When the
device is successfully enumerated and configured, the LED indicator will be permanently
ON. During suspend, the LED will be OFF.
This feature provides a user-friendly indicator on the status of the USB device. It is a
useful field diagnostics tool to isolate faulty equipment.
To use the GoodLink feature the UP_LED signal should control an LED. The UP_LED
signal is controlled using the SIE Configure Device command.
Transactions on the USB bus transfer data between device endpoints and the host. The
direction of a transaction is defined with respect to the host. OUT transactions transfer
data from the host to the device. IN transactions transfer data from the device to the host.
All transactions are initiated by the host controller.
For an OUT transaction, the USB ATX receives the bi-directional D+ and D- signals of the
USB bus. The Serial Interface Engine (SIE) receives the serial data from the ATX and
converts it into a parallel data stream. The parallel data is written to the corresponding
endpoint buffer in the EP_RAM.
For IN transactions, the SIE reads the parallel data from the endpoint buffer in EP_RAM,
converts it into serial data, and transmits it onto the USB bus using the USB ATX.
Rev. 04 — 26 August 2009
Chapter 13: LPC24XX USB device controller
UM10237
© NXP B.V. 2009. All rights reserved.
333 of 792
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