LPC2470FBD208,551 NXP Semiconductors, LPC2470FBD208,551 Datasheet - Page 70
![IC ARM7 MCU LCD 208-LQFP](/photos/12/13/121391/208-lqfp_sot459-1_pkg_sml.jpg)
LPC2470FBD208,551
Manufacturer Part Number
LPC2470FBD208,551
Description
IC ARM7 MCU LCD 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets
1.OM11077.pdf
(792 pages)
2.LPC2470FET208551.pdf
(89 pages)
3.LPC2470FET208551.pdf
(91 pages)
Specifications of LPC2470FBD208,551
Package / Case
208-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Type
ROMless
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2470U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208LQFP
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4361-5
935284068551
LPC2470FBD208-S
935284068551
LPC2470FBD208-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2470FBD208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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- Download datasheet (5Mb)
NXP Semiconductors
UM10237_4
User manual
Fig 15. EMC block diagram
5.1 AHB slave register interface
The functions of the EMC blocks are described in the following sections:
Note: For 32 bit wide chip selects data is transferred to and from dynamic memory in
SDRAM bursts of four. For 16 bit wide chip selects SDRAM bursts of eight are used.
The AHB slave register interface block enables the registers of the EMC to be
programmed. This module also contains most of the registers and performs the majority of
the register address decoding.
To eliminate the possibility of endianness problems, all data transfers to and from the
registers of the EMC must be 32 bits wide.
Note: If an access is attempted with a size other than a word (32 bits), it causes an
ERROR response to the AHB bus and the transfer is terminated.
•
•
•
•
•
AHB slave register interface.
AHB slave memory interfaces.
Data buffers.
Memory controller state machine.
Pad interface.
INTERFACE
INTERFACE
AHB SLAVE
AHB SLAVE
REGISTER
MEMORY
EMC
CONTROLLER
BUFFERS
MACHINE
MEMORY
STATE
DATA
Rev. 04 — 26 August 2009
Chapter 5: LPC24XX External Memory Controller (EMC)
A[23:0]
D[31:0]
WE
OE
BLS[3:0]
CS[3:0]
DYCS[3:0]
CAS
RAS
CLKOUT[1:0]
CKEOUT[3:0]
DQMOUT[3:0]
shared
signals
static
memory
signals
dynamic
memory
signals
UM10237
© NXP B.V. 2009. All rights reserved.
70 of 792
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