LPC2470FBD208,551 NXP Semiconductors, LPC2470FBD208,551 Datasheet - Page 497
![IC ARM7 MCU LCD 208-LQFP](/photos/12/13/121391/208-lqfp_sot459-1_pkg_sml.jpg)
LPC2470FBD208,551
Manufacturer Part Number
LPC2470FBD208,551
Description
IC ARM7 MCU LCD 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets
1.OM11077.pdf
(792 pages)
2.LPC2470FET208551.pdf
(89 pages)
3.LPC2470FET208551.pdf
(91 pages)
Specifications of LPC2470FBD208,551
Package / Case
208-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Type
ROMless
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2470U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208LQFP
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4361-5
935284068551
LPC2470FBD208-S
935284068551
LPC2470FBD208-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2470FBD208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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NXP Semiconductors
11. Global acceptance filter
12. Acceptance filter modes
UM10237_4
User manual
12.1 Acceptance filter Off mode
Table 440. Central Miscellaneous Status Register (CANMSR - address 0xE004 0008) bit
This block provides lookup for received Identifiers (called Acceptance Filtering in CAN
terminology) for all the CAN Controllers. It includes a 512 × 32 (2 kB) RAM in which
software maintains one to five tables of Identifiers. This RAM can contain up to 1024
Standard Identifiers or 512 Extended Identifiers, or a mixture of both types.
The Acceptance Filter can be put into different modes by setting the according AccOff,
AccBP, and eFCAN bits in the Acceptance Filter Mode Register
“Acceptance Filter Mode Register (AFMR - 0xE003
access to the Configuration Register and the ID Look-up table is handled differently.
Table 441. Acceptance filter modes and access control
[1]
[2]
A write access to all section configuration registers is only possible during the Acceptance
Filter Off and Bypass Mode. Read access is allowed in all Acceptance Filter Modes.
The Acceptance Filter Off Mode is typically used during initialization. During this mode an
unconditional access to all registers and to the Look-up Table RAM is possible. With the
Acceptance Filter Off Mode, CAN messages are not accepted and therefore not stored in
the Receive Buffers of active CAN Controllers.
Bit
8
9
31:10 -
Acceptance
filter mode
Off Mode
Bypass
Mode
Operating
Mode and
FullCAN
Mode
The whole ID Look-up Table RAM is only word accessible.
During the Operating Mode of the Acceptance Filter the Look-up Table can be accessed only to disable or
enable Messages.
Symbol Description
BS1
BS2
description
Bit
AccOff
1
X
0
When 1, the CAN controller is currently not involved/prohibited from bus
activity (same as BS in CAN1GSR).
When 1, the CAN controller is currently not involved/prohibited from bus
activity (same as BS in CAN1GSR).
Reserved, user software should not write ones to reserved bits. The
value read from a reserved bit is not defined.
Bit
AccBP
0
1
0
Rev. 04 — 26 August 2009
Acceptance
filter state
reset &
halted
reset &
halted
running
Chapter 18: LPC24XX CAN controllers CAN1/2
ID Look-up
table
RAM
r/w access
from CPU
r/w access
from CPU
read only
from CPU
[1]
C000)”). During each mode the
[2]
Acceptanc
e filter
config.
registers
r/w access
from CPU
r/w access
from CPU
access from
Acceptance
filter only
(Section 18–15.1
CAN controller
message receive
interrupt
no messages
accepted
all messages
accepted
hardware
acceptance filtering
UM10237
© NXP B.V. 2009. All rights reserved.
497 of 792
Reset
Value
0
0
NA
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